PTAB
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  • PTAB · Dec 16, 2024 · IPR2024-00976 · APJ Grace Karaffa Obermann · IPR · Institution

    The Board denied institution because BOE did not show a reasonable likelihood of prevailing on claims 1–3 under any of its three obviousness grounds.

    RulingsInstitution decision
    • PTAB / AIA Trials › Institution threshold (reasonable likelihood / more likely than not)Institution denied meritsDenied

      “We have authority to institute an inter partes review where a petitioner shows a reasonable likelihood of prevailing with respect to at least one challenged claim. 35 U.S.C. § 314(a); 37 C.F.R. § 42.4(a). For reasons that follow, Petitioner does not meet that evidentiary threshold. We decline to reach the issues raised in the Reply or Sur-reply, which relate to Patent Owner’s alternative argument that a discretionary denial of the Petition is warranted.” slip op. at 2

    • Skill levelSkill level petitioner adoptedOther

      “education could substitute for professional experience and vice versa.” Pet. 26. Patent Owner “does not dispute the level of skill for a person of ordinary skill in the art” as “set forth in the Petition.” Prelim. Resp. 11. For purposes of this Decision, we adopt Petitioner’s unopposed definition (Pet. 26) because, on this record, it is consistent with the specification. We take note that neither party indicated that the result would change under any different definition.” slip op. at 9

    • Claim Construction › Threshold & procedure › Whether a term needs construction (O2 Micro)No construction neededOther

      “We construe terms in controversy only to the extent necessary to resolve the controversy. See Nidec Motor Corp. v. Zhongshan Broad Ocean Motor Co., 868 F.3d 1013, 1017 (Fed. Cir. 2017) (quoting Vivid Techs., Inc. v. Am. Sci. & Eng’g, Inc., 200 F.3d 795, 803 (Fed. Cir. 1999)). Petitioner discusses the terms a “data line having a broad-width portion” and a “scanning line having a broad-width portion” recited in claim 1, as well as a “data line having a broad portion” and a “scanning line having a broad-width portion” recited in claim 2. Petitioner cites the ’079 patent for “offering a lexicographic definition of the term ‘broad width’” to support the plain meaning interpretation of the terms “‘broad-width portion’ and ‘broad portion’ as a portion that is broader than another portion of the subject element.” Pet. 16. Patent Owner does not provide arguments directed specifically to Petitioner’s proposed claim constructions. See Prelim. Resp. 10–11. Taking account of the information presented, we determine that no claim term requires express construction for purposes of deciding whether to institute review. Compare Pet. 16 (addressing issues of claim construction, citing the ’079 patent for supporting the plain and ordinary meaning of “broad-width portion” and “broad portion” without demonstrating that an express construction is necessary to resolve whether to institute review), with Prelim. Resp. 10–11 (addressing the merits of Petitioner’s challenges, without asserting an express claim construction). To the extent that the scope of any claim term requires discussion, however, we provide it in the following analysis of the challenges.” slip op. at 9

    • Obviousness (§103) › Motivation to combine / reasonable expectation of successMotivation not foundNot shown unpatentableNot shown unpatentable

      “Id. (emphasis added). Sato ¶ 26 is entirely silent on scan lines and clearly links the cited benefits to “this arrangement” of “data lines composed of an Al film.” Id. Importantly, Petitioner does not connect Sato’s disclosure, relating to benefits associated with a data line arrangement, to any particular arrangement of scan lines. Sato ¶ 28 is equally deficient. Sato ¶ 28 also discusses benefits of utilizing a specific “arrangement,” namely, “capacitance lines formed of [a] metal film.” Id. ¶ 28. [0028] With this arrangement, the provision of the function as the shading layer with the capacitance lines formed of the metal film, the polysilicon film, or the like, in addition to the function as the wiring, as well as the provision of the function as the light absorption layer with the capacitance electrodes formed of the polysilicon film, or the like, in addition to the function as electrodes, prevents the laminated structure from becoming complex by additionally forming a dedicated shading layer and a dedicated light absorption layer. Accordingly, this arrangement is very advantageous by simply arranging the electro-optical device, and simplifies a manufacturing process thereof. Id. (emphasis added). Here again, Sato ¶ 28 is entirely silent on scan lines and clearly links the cited benefits to “this arrangement” of “capacitance lines formed of metal film.” Id. Petitioner does not bridge the gap in its rationale to combine by attempting to explain why an ordinarily skilled artisan would have extrapolated benefits, pertaining to an arrangement of capacitance lines, to a similar arrangement of scan lines. Petitioner’s witness, Dr. Flasck, provides no further insight as to how or why Sato ¶¶ 26 and 28 would have been understood to apply to scan lines. Dr. Flasck’s comments on Sato ¶¶ 26 and 28 merely repeat, nearly verbatim, the Petition’s conclusory contentions. See Ex. 1002 ¶ 139 (Dr. Flasck declaring “Sato specifically teaches that its device ‘is very advantageous by simply arranging the electro-optical device, and simplifies a manufacturing process thereof.’”); Pet. 37. Dr. Flasck does not cite to any additional supporting evidence other than Sato ¶¶ 26 and 28. Ex. 1002 ¶ 139.” slip op. at 15

    Claim construction§ 103 obviousnesscites Phillips · Graham
    Patents in suitUS 7,502,079
  • PTAB · Dec 16, 2024 · IPR2024-00977 · APJ Christopher M Kaiser · IPR · Institution

    The Board denied institution because Petitioner did not show a reasonable likelihood of proving claims 7–13 and 15–20 unpatentable on any asserted ground.

    RulingsInstitution decision
    • PTAB / AIA Trials › Institution threshold (reasonable likelihood / more likely than not)Institution denied meritsInstitution denied

      “determine whether to institute an inter partes review under 35 U.S.C. § 314 and 37 C.F.R. § 42.4(a). Inter partes review may not be instituted unless “the information presented in the petition filed under [35 U.S.C.] section 311 and any response filed under [35 U.S.C.] section 313 shows that there is a reasonable likelihood that the petitioner would prevail with respect to at least 1 of the claims challenged in the petition.” 35 U.S.C. § 314(a) (2018). “When instituting inter partes review, the Board will authorize the review to proceed on all of the challenged claims and on all grounds of unpatentability asserted for each claim.” 37 C.F.R. § 42.108(a) (2023).” slip op. at 2

    • Skill levelSkill level petitioner adoptedDecided for petitioner

      “had at least a Bachelor’s degree in electrical engineering, computer science, physics, or a similar field and at least two years of experience designing semiconductor display devices, including LCD displays.” Pet. 19. Petitioner also asserts that “[a]dditional relevant work experience can compensate for less education, and vice versa.” Id. On the record presented, Patent Owner “does not dispute the level of skill for a person of ordinary skill in the art . . . set forth in the Petition.” Prelim. Resp. 8. Neither party explains why the outcome of this case would be affected by the adoption of any particular proffered definition of a person of ordinary skill in the art. For purposes of this Decision, we adopt Petitioner’s assessment of the level of ordinary skill in the art, as it appears consistent with the ’606 patent and the asserted prior art. See Okajima v. Bourdeau, 261 F.3d 1350, 1355 (Fed. Cir. 2001).” slip op. at 7

    • Claim Construction › Threshold & procedure › Whether a term needs construction (O2 Micro)No construction neededOther

      “As discussed below, we are able to determine whether to institute review without resolving the construction of any claim terms. Accordingly, we need not and do not construe any terms expressly. See Realtime Data, LLC v. Iancu, 912 F.3d 1368, 1375 (Fed. Cir. 2019) (“The Board is required to construe ‘only those terms . . . that are in controversy, and only to the extent necessary to resolve the controversy.’” (quoting Vivid Techs., Inc. v. Am. Sci. & Eng’g, Inc., 200 F.3d 795, 803 (Fed. Cir. 1999))).” slip op. at 8

    • Novelty / Anticipation (§102) › Anticipation standard (single reference, every element)Not shown unpatentableNot shown unpatentable

      “view. First, as Petitioner admits, data line 6a is not connected to image signal line 101d and line 109 other than when sample hold circuit 101c connects them due to shift register 101b outputting an enabling signal. Pet. 49. This is supported by the layout of the four elements in Fujikawa’s Figure 2. Ex. 1005, Fig. 2 (depicting sample hold circuits 101c between and connecting data lines 6a and signal lines 101d). In addition, Patent Owner’s declarant, Dr. E. Fred Schubert, testifies that “two separate lines straddling circuitry are [not] one line.” Ex. 2001 ¶ 64. The dispute between the parties on this issue is largely one of claim construction: should the term “wiring line” in claim 7 be construed broadly enough to encompass a collection of lines separated by a sample hold circuit? In order to determine that Fujikawa discloses or teaches the recited wiring lines, we would need to answer this question in the affirmative. Yet, as discussed above, neither party proposes construing “wiring line,” or any other term used in the claims of the ’606 patent. Pet. 18; Prelim. Resp. 7. The failure to argue for and sufficiently support a broad construction of the term “wiring line” means that Petitioner does not show sufficiently, for purposes of supporting institution of review, that Fujikawa discloses or teaches the “wiring line” limitation of claim 7. b) Conclusion Regarding Claim 7 Based on the record presented, we determine that Petitioner has not shown that there is a reasonable likelihood that Petitioner will prevail in demonstrating that claim 7 is unpatentable as anticipated by or obvious in view of Fujikawa.” slip op. at 11

    Claim construction§ 102 anticipation§ 103 obviousnesscites Phillips · KSR · Graham
    Patents in suitUS 9,557,606
  • PTAB · Dec 16, 2024 · IPR2024-00973 · APJ George R Hoskins · IPR · Institution

    The Board instituted IPR of claims 1–18 on all asserted grounds, finding a reasonable likelihood that BOE would prevail on claim 4 over Reiner.

    RulingsInstitution decision
    • PTAB / AIA Trials › Discretionary denial › Fintiv (parallel litigation)Decided for petitioner

      “We secondly conclude Petitioner’s stipulation is commensurate in scope with a Sotera stipulation. See Sotera, Paper 12, at 13–14, 18–19; Guidance Memo, at 3. The Guidance Memo states: Consistent with Sotera Wireless, Inc., the PTAB will not discretionarily deny institution in view of parallel district court litigation where a petitioner presents a stipulation not to pursue in a parallel proceeding the same grounds or any grounds that could have reasonably been raised before the PTAB. Guidance Memo, 3, 7–8. Thus, applying that guidance here, we do not deny institution in view of the Co-Pending Litigation.” slip op. at 9

    • PTAB / AIA Trials › Institution threshold (reasonable likelihood / more likely than not)InstitutedInstituted

      “We conclude the preliminary record supports, sufficiently to justify institution, Petitioner’s contention that a person of ordinary skill in the art would have been motivated to configure Reiner’s gate/scanning driver 63 to include the ESD protection network structure illustrated in Figure 5. First, we agree with Petitioner’s position that Reiner discloses both of its display drivers 61 and 63 would benefit from ESD protection. That is, Reiner describes display drivers 61 and 63 as “typical example[s]” of integrated circuit devices that can benefit from utilizing Reiner’s bump bridge technology for providing ESD protection, due to the large number of parallel output lines that must cross power supply lines. See Ex. 1005, 4:15–16, 9:11–20 (describing Fig. 4), 12:4–5. Thus, based on this preliminary record, we disagree with Patent Owner’s position that Petitioner mischaracterizes Reiner’s teachings in this regard. Second, based on the preliminary record, Dr. Murphy’s testimony that the ESD protection network structure of Reiner’s Figure 5 would be suitable for implementing in Reiner’s gate/scanning driver 63 due to similarities between the two drivers is supported by the evidence sufficiently to justify institution. See Ex. 1003 ¶¶ 104–105, 111–120. A first similarity is Reiner’s indication that both display drivers 61 and 63 “have areas where the output or input metal lines have to cross power supply lines” Vdd and Vss. Ex. 1005, 9:11–20, 12:4–5, Fig. 3 (illustrating exemplary integrated circuit device 30 powered by supply voltages Vdd and Vss). A second similarity is Dr. Murphy’s testimony that, at least in some embodiments of Reiner’s gate/scanning driver 63, “each of the [scan] lines being driven will have its own semiconductor units . . . [that] drive that particular line,” akin to the individual output devices 70 and source lines 67 of Figure 5. Ex. 1003 ¶¶ 113, 117; see also Prelim. Resp. 21–22 (arguing “Reiner [discloses] that the gate driver integrated circuit comprises individual gate drivers” and “a POSITA would understand that individual gate/scan line drivers are coupled to one another”). These similarities between Reiner’s display drivers 61 and 63 support Dr. Murphy’s conclusion that Reiner’s bump bridge technology for providing ESD protection could and would have been implemented in Reiner’s gate/scanning driver 63 in the same fashion as illustrated in Figure 5 for Reiner’s source/data driver module 61. We appreciate, as Dr. Schubert testifies, that the individual circuits in gate/scanning driver 63 will drive their respective gate/scan lines 68 in different ways than the individual output devices 70 in source/data driver module 61 will drive their respective source/data lines 67. See Ex. 2001 ¶¶ 55–59. Nonetheless, based on the present record, we conclude such differences in the signal outputs of Reiner’s display drivers 61 and 63 have little to do with the benefits of configuring the power inputs of the display drivers to protect the individual circuits from electrostatic discharge events, or how to do so.” slip op. at 35

    • Obviousness (§103) › Motivation to combine / reasonable expectation of successMotivation foundDecided for petitioner

      “We conclude the preliminary record supports, sufficiently to justify institution, Petitioner’s contention that a person of ordinary skill in the art would have been motivated to configure Reiner’s gate/scanning driver 63 to include the ESD protection network structure illustrated in Figure 5. First, we agree with Petitioner’s position that Reiner discloses both of its display drivers 61 and 63 would benefit from ESD protection. That is, Reiner describes display drivers 61 and 63 as “typical example[s]” of integrated circuit devices that can benefit from utilizing Reiner’s bump bridge technology for providing ESD protection, due to the large number of parallel output lines that must cross power supply lines. See Ex. 1005, 4:15–16, 9:11–20 (describing Fig. 4), 12:4–5. Thus, based on this preliminary record, we disagree with Patent Owner’s position that Petitioner mischaracterizes Reiner’s teachings in this regard. Second, based on the preliminary record, Dr. Murphy’s testimony that the ESD protection network structure of Reiner’s Figure 5 would be suitable for implementing in Reiner’s gate/scanning driver 63 due to similarities between the two drivers is supported by the evidence sufficiently to justify institution. See Ex. 1003 ¶¶ 104–105, 111–120. A first similarity is Reiner’s indication that both display drivers 61 and 63 “have areas where the output or input metal lines have to cross power supply lines” Vdd and Vss. Ex. 1005, 9:11–20, 12:4–5, Fig. 3 (illustrating exemplary integrated circuit device 30 powered by supply voltages Vdd and Vss). A second similarity is Dr. Murphy’s testimony that, at least in some embodiments of Reiner’s gate/scanning driver 63, “each of the [scan] lines being driven will have its own semiconductor units . . . [that] drive that particular line,” akin to the individual output devices 70 and source lines 67 of Figure 5. Ex. 1003 ¶¶ 113, 117; see also Prelim. Resp. 21–22 (arguing “Reiner [discloses] that the gate driver integrated circuit comprises individual gate drivers” and “a POSITA would understand that individual gate/scan line drivers are coupled to one another”). These similarities between Reiner’s display drivers 61 and 63 support Dr. Murphy’s conclusion that Reiner’s bump bridge technology for providing ESD protection could and would have been implemented in Reiner’s gate/scanning driver 63 in the same fashion as illustrated in Figure 5 for Reiner’s source/data driver module 61. We appreciate, as Dr. Schubert testifies, that the individual circuits in gate/scanning driver 63 will drive their respective gate/scan lines 68 in different ways than the individual output devices 70 in source/data driver module 61 will drive their respective source/data lines 67. See Ex. 2001 ¶¶ 55–59. Nonetheless, based on the present record, we conclude such differences in the signal outputs of Reiner’s display drivers 61 and 63 have little to do with the benefits of configuring the power inputs of the display drivers to protect the individual circuits from electrostatic discharge events, or how to do so.” slip op. at 35

    • Skill levelSkill level petitioner adoptedDecided for petitioner

      “to the ’157 patent “would have had at least a Bachelor’s degree in electrical engineering, computer science, physics, or a similar field and at least two years of experience designing semiconductor display devices, including LCD displays,” and “[a]dditional relevant work experience can compensate for less education, and vice versa.” Pet. 15–16; Ex. 1003 ¶¶ 75–76. “Patent Owner does not dispute the level of skill for a person of ordinary skill in the art . . . set forth in the Petition.” Prelim. Resp. 14; Ex. 2001 ¶¶ 19–20. For purposes of this Decision, we adopt Petitioner’s assessment of the level of ordinary skill in the art, as it appears to be consistent with the ’157 patent and the asserted prior art. See Okajima v. Bourdeau, 261 F.3d 1350, 1355 (Fed. Cir. 2001).” slip op. at 10

    Claim construction§ 103 obviousnessDiscretionary denialcites KSR · Graham
    Patents in suitUS 9,184,157
  • PTAB · Dec 16, 2024 · IPR2024-00953 · APJ Amee A Shah · IPR · Institution

    The Board denied institution of IPR on claims 1–46 under § 314(a), finding the petitioner had not justified parallel petitions challenging the same claims.

    RulingsInstitution decision
    • Parallel petitionsInstitution denied discretionary otherInstitution denied

      “parallel petitions challenging claims 1–46 of the ’380 patent are warranted. The mere fact that different references are asserted in this proceeding and the ՚1296 IPR is not justification for a parallel petition under the circumstances presented here. Weighing all the circumstances here, including Patent Owner’s acknowledgment of Petitioner’s preference of the ՚1296 IPR in arguing for denial of this proceeding and in its objection to the dismissal request, we deny this proceeding in favor of evaluating institution of inter partes review in the ՚1296 IPR to reduce the unnecessary burden on the Board and on the Patent Owner and for fairness and efficiency concerns. Based on these circumstances, we find that the reasons provided by Petitioner do not show that parallel petitions are warranted. However, we emphasize that the denial of institution of this proceeding in favor of the ՚1296 IPR does not impact the merits of the ՚1296 IPR. In other words, the denial of institution of this proceeding does not address the substance of the ՚1296 IPR nor does it affect the denial or grant of institution of the ՚1296 IPR.” slip op. at 10

    Discretionary denial
    Patents in suitUS 11,413,380
  • PTAB · Dec 11, 2024 · IPR2024-00975 · APJ Christopher M Kaiser · IPR · Institution

    The Board denied institution because the petition did not show a reasonable likelihood that any challenged claim was obvious over the asserted grounds.

    RulingsInstitution decision
    • PTAB / AIA Trials › Institution threshold (reasonable likelihood / more likely than not)Institution denied meritsInstitution denied

      “determine whether to institute an inter partes review under 35 U.S.C. § 314 and 37 C.F.R. § 42.4(a). Inter partes review may not be instituted unless “the information presented in the petition filed under [35 U.S.C.] section 311 and any response filed under [35 U.S.C.] section 313 shows that there is a reasonable likelihood that the petitioner would prevail with respect to at least 1 of the claims challenged in the petition.” 35 U.S.C. § 314(a) (2018). “When instituting inter partes review, the Board will authorize the review to proceed on all of the challenged claims and on all grounds of unpatentability asserted for each claim.” 37 C.F.R. § 42.108(a) (2023).” slip op. at 2

    • Skill levelSkill level petitioner adoptedDecided for petitioner

      “possessed at least a four-year degree in electrical engineering or a closely related field, and at least two years of experience in semiconductor device design.” Pet. 1. Petitioner also asserts that “[a]dditional education could substitute for professional experience and vice versa.” Id. On the present record, Patent Owner does not dispute this proposed level of skill. Prelim. Resp. 1–78. Neither party explains why the outcome of this case would be affected by the adoption of any of the proffered definitions of a person of ordinary skill in the art. For purposes of this Decision, we adopt Petitioner’s assessment of the level of ordinary skill in the art, as it appears consistent with the ’481 patent and the asserted prior art. See Okajima v. Bourdeau, 261 F.3d 1350, 1355 (Fed. Cir. 2001).” slip op. at 7

    • Claim Construction › Threshold & procedure › Whether a term needs construction (O2 Micro)No construction neededNot reached

      “On the present record, neither party proposes any claim terms for construction. Pet. 3; Prelim. Resp. 1–78. As discussed below, we are able to determine whether to institute review without resolving the construction of any claim terms. Accordingly, we need not and do not construe any terms expressly. See Realtime Data, LLC v. Iancu, 912 F.3d 1368, 1375 (Fed. Cir. 2019) (“The Board is required to construe ‘only those terms . . . that are in controversy, and only to the extent necessary to resolve the controversy.’” (quoting Vivid Techs., Inc. v. Am. Sci. & Eng’g, Inc., 200 F.3d 795, 803 (Fed. Cir. 1999))).” slip op. at 8

    • Obviousness (§103) › Graham factors (scope of art, differences, level of skill)Not shown unpatentableNot shown unpatentable

      “‘run[ning] generally parallel to the lateral extent of a semiconductor material or semiconductor carrier’” and that “[t]he ’481 patent . . . describes a device that ‘has a lateral drift path.’” Pet. 24 (quoting Ex. 1001, 3:14–18, 4:37–38). Patent Owner directs us to a statement in the prosecution history that “[a] lateral transistor is a transistor in which current flows across ‘in the direction parallel to’ the device surface,” as opposed to “a vertical transistor,” in which “[c]urrent ‘flows in the direction normal to’ the device surface.” Prelim. Resp. 8 (quoting Ex. 1002, 33–34). Thus, the parties generally agree that a lateral transistor is a transistor in which current flows in a direction parallel to the surface of the transistor. Petitioner argues that Nega teaches or suggests a transistor in which current flows parallel to the surface because Nega’s source, gate, and drain electrodes “are spread laterally in a lateral drift path, instead of vertically stacked.” Pet. 24–25 (citing Ex. 1005, Fig. 2). Patent Owner argues to the contrary that the placement of source, gate, and drain electrodes in the same lateral plane, rather than in a vertical stack, does not necessarily indicate that the current flow within the transistor is parallel to the surface. Prelim. Resp. 47–48 (citing Ex. 2002, 7–8, Figs. 1.7a, 1.7c). According to Patent Owner, transistors with electrodes in the same horizontal plane can have either lateral or vertical current flow. Id. Thus, Patent Owner argues, the lateral placement of the source, gate, and drain electrodes in Nega does not mean that Nega teaches or suggests a lateral transistor. On the present record, we agree with Patent Owner that Petitioner has not shown sufficiently that Nega teaches a transistor in which current flows in a direction parallel to the surface, rather than in a direction normal to the surface. Transistors with current flow in either direction can have electrodes located on a common horizontal plane, with the direction of the current flow depending on the configuration of doped semiconductor regions located below the electrodes. Ex. 2002, Figs. 1.7a, 1.7c. Because Petitioner relies on the location of Nega’s electrodes, rather than on any particular configuration of doped semiconductor regions in Nega, Petitioner does not show sufficiently that Nega teaches a lateral transistor.” slip op. at 10

    Claim construction§ 103 obviousnesscites Phillips · KSR · Graham
    Patents in suitUS 9,899,481
  • PTAB · Dec 10, 2024 · IPR2024-00910 · APJ Jo-Anne M Kokoski · IPR · Institution

    The Board denied institution because Micron did not show a reasonable likelihood that claims 7–10 would have been obvious over Park.

    RulingsInstitution decision
    • PTAB / AIA Trials › Institution threshold (reasonable likelihood / more likely than not)Institution denied meritsInstitution denied

      “structure that does not function as a source to the memory cell.” Section II.B.1, supra. Thus, Petitioner must show that Park’s common source lines 144 and dummy source lines 146 do not function as sources to the memory cell. Harmonic Inc. v. Avid Tech. Inc., 815 F.3d 1356, 1363 (Fed. Cir. 2016) (stating that it is Petitioner’s burden to show with particularity why a challenged claim is unpatentable); see also 37 C.F.R. § 42.104(b)(4) (A petition “must specify where each element of the claim is found in the prior art patents or printed publications relied upon.”). Based on the current record, we are not persuaded that Petitioner sufficiently shows that Park teaches the claimed “dummy source structure.” Petitioner’s reasoning with respect to common source lines 144 is based on Petitioner’s proposed claim construction, which we do not adopt for purposes of this Decision. See Pet. 54–60. Park distinguishes common source lines 144 that are included on the memory cell structure with first and second channel structures 120a and 120b, and gate lines 134 from dummy source lines 146 that are included on the dummy region with second structure 140 and third channel structure 120c that “may not serve as a channel of the memory cell, and may merely serve as a supporting pillar of the second structure 140.” Ex. 1005, 6:9–11, 8:1–2, 8:57–60. That common source lines 144 are disposed on the cell region of the substrate while dummy source lines 146 are disposed on the dummy region alone at least indicates that the common source lines 144 and dummy source lines 146 may not operate in the same way or serve the same purpose. On this record, neither Petitioner nor Dr. Banerjee sufficiently explains why Park’s common source lines 144 are “structures that do not function as sources for the memory cell.”” slip op. at 21

    • Skill levelSkill level petitioner adoptedDecided for petitioner

      “II. ANALYSIS A. Level of Ordinary Skill in the Art Petitioner contends that a person of ordinary skill in the art (“POSITA”) would have had “a bachelor of science degree in electrical engineering or a similar discipline” with “2–3 years of professional experience working with (e.g., researching, designing, or teaching) monolithic 3D structures and NAND memory devices,” or “an equivalent level of skill, knowledge, and experience (e.g., an advanced degree may replace some of the professional experience).” Pet. 38. Petitioner further contends that a “POSITA would have been aware of and generally knowledgeable about 3D NAND’s structure, how it is manufactured, and its component parts.” Id. (citing Ex. 1003 ¶¶ 40–43). At this stage of the proceeding, Patent Owner neither responds to Petitioner’s proposed definition, nor provides a definition of its own. See generally, Prelim. Resp. Petitioner’s undisputed proposed definition appears to be consistent with the cited prior art and the disclosure of the ’872 patent, and we adopt it for purposes of this Decision. See Okajima v. Bourdeau, 261 F.3d 1350, 1355 (Fed. Cir. 2001) (explaining that specific findings regarding ordinary skill” slip op. at 6

    • Claim Construction › Intrinsic evidence (Phillips canons) › Plain and ordinary meaning to a POSITATerm construed patent owner constructionDecided for patent owner

      “The Specification teaches that “[e]ach dummy source structure may include an insulating spacer layer in a dummy source hole and a conductive contact within the spacer layer.” Ex. 1001, 5:37–40; see also id. at 11:39–43 (“Dummy source structure 178 can further include a spacer 177 made of any suitable dielectric materials (e.g., silicon oxide) between contact 179 and memory stack 160 to electrically separate surrounding conductive layers 106 in memory stack 160 from contact 179.”). The Specification further teaches that “[i]n some embodiments, one or more dummy source structures are in contact with the substrate and may provide interconnect between the 3D memory device and peripheral devices.” Id. at 5:40–43; see also id. at 11:46–49 (“In some embodiments, dummy source structures 178 may function as interconnects to connect 3D memory device 100 with other peripheral devices.”). The Specification teaches that such peripheral devices include “any suitable digital, analog, and/or mixed-signal peripheral circuits used for facilitating the operation of 3D memory device 100, such as page buffers, decoders, and latches.” Id. at 9:34–42. The Specification explains that dummy source structures “can be uniformly distributed in the staircase structure,” and the arrangement of the dummy source structures “may improve the uniformity and stability for etching dummy channel holes in the staircase region” and “may allow the gate electrode/word lines to be formed with improved uniformity and quality, reducing the resistivity of the gate electrodes/word lines.” Id. at 5:43–52; see also id. at 8:49–53 (“The symmetrical architecture of dummy channel structures and dummy source structures can improve the performance and efficiency of etching processes. Different layouts, patterns, and designs may be adopted based on the size of the staircase region.”).” slip op. at 11

    • Claim Construction › Threshold & procedure › Whether a term needs construction (O2 Micro)No construction neededDecided for patent owner

      “currently before us, and for purposes of this Decision, we agree with Patent Owner that “surrounding” requires more than structures on two sides of the object. The Specification repeatedly uses “between” to describe objects in the middle of two structures. See, e.g., Ex. 1001, 3:65–67 (“a layer can be located between any pair of horizontal planes between, or at, a top surface and a bottom surface of the continuous structure”), 4:56–57 (“dummy channel holes are formed between adjacent GLSs”), 7:12–15 (“one or more dummy channel structures may be located between two dummy source structures, and vice versa”), 7:16–17 (“at least one dummy source structure may be located between two staircase contacts”), 9:63–64 (“an insulation layer (not shown) is formed between substrate 102 and memory stack 160), 17:42–44 (“at least one dummy source structure is located between the first and second staircase contacts”). In contrast, the Specification uses “surrounding” to indicate an object in the middle of more than two structures. See, e.g., id. at 6:38–41 (“multiple dummy source structures, such as the four dummy source structures indicated by a diamond shape 146, may surround a staircase contact, such as staircase contact 122”), 6:60–63 (“A plurality of dummy channel structures, such as the four dummy channel structures indicated by square shape 148, may surround a staircase contact.”), 7:31–34 (“four dummy channel structures indicated by dashed-line square shape 142 are surrounded by eight dummy source structures indicated by an octagon 144”), 7:38–40 (“one dummy channel structure indicated by dashed-line square 147 is surrounded by four dummy source structures indicated by a diamond 149”), 17:61–62 (“at least one dummy channel structure is surrounded by at least four dummy source structures”), 17:63–64 (“at least two dummy channel structures are surrounded by at least six dummy source structures”), 17:65–67 (“at least four dummy channel structures are surrounded by at least eight dummy source structures”). That claim 15 recites “wherein at least one dummy channel structure is surrounded by at least four dummy source structures” and claim 14, from which claim 15 depends, recites “wherein a subset of the dummy channel structures is surrounded by the plurality of dummy source structures,” does not require a different result. While we agree with Petitioner that the doctrine of claim differentiation may “impl[y] that ‘surrounded’ in independent claim 14 covers implementations in which fewer than four dummy source structures surround a single dummy channel structure,” that does not require that “surround” encompasses a dummy channel structure between two dummy source structures. Pet. 33 (citing Ex. 1001, claim 15 (21:9–11)). For example, three dummy source structures surrounding one dummy source structure could satisfy claim 14 but not claim 15 (“at least four dummy source structures”). Accordingly, we determine that “surrounding” in claim 1 of the ’872 patent does not encompass structures on only two sides of an object. We need not provide an explicit construction of “surrounding,” as terms in controversy need to be construed only to the extent necessary to resolve the controversy. Realtime Data, 912 F.3d at 1375.” slip op. at 15

    Claim construction§ 103 obviousnesscites Phillips
    Patents in suitUS 10,861,872
  • PTAB · Dec 10, 2024 · IPR2024-00912 · APJ Jo-Anne M Kokoski · IPR · Institution

    The Board denied institution because Micron did not show a reasonable likelihood that claim 7 was obvious over Seo and Choi or Nam and Choi.

    RulingsInstitution decision
    • PTAB / AIA Trials › Institution threshold (reasonable likelihood / more likely than not)Institution denied meritsDenied

      “Institution of an inter partes review is authorized by statute when “the information presented in the petition . . . and any response . . . shows that there is a reasonable likelihood that the petitioner would prevail with respect to at least 1 of the claims challenged in the petition.” 35 U.S.C. § 314 (2018); see also 37 C.F.R. § 42.4 (2023). For the reasons discussed below, we deny the Petition and do not institute an inter partes review.” slip op. at 2

    • Skill levelSkill level petitioner adoptedOther

      “(“POSITA”) would have had “a master’s degree in electrical engineering or a similar discipline” with “4–5 years of professional experience working with (e.g., researching, designing, or developing) NAND flash memory devices (including issues relating to the operation, e.g., reading of said devices), or an equivalent level of skill, knowledge, and experience (e.g., an advanced degree may replace some of the professional experience).” Pet. 28–29 (citing Ex. 1003 ¶¶ 35–39). At this stage of the proceeding, Patent Owner neither responds to Petitioner’s proposed definition, nor 1 The Leahy-Smith America Invents Act (“AIA”), Pub. L. No. 112–29, 125 Stat. 284 (2011), revised 35 U.S.C. §§ 102 and 103 effective March 16, 2013. Because the ’342 patent has an effective filing date after March 16, 2013 (Ex. 1001, codes (22), (63)), we refer to the AIA version of Sections 102 and 103. 2 Seo, US 2021/0027848 A1, published Jan. 28, 2021 (Ex. 1005). 3 Bongsik Choi et al., Comprehensive evaluation of early retention (fast charge loss within a few seconds) characteristics in tube-type 3-D NAND Flash Memory, SYMPOSIUM ON VLSI TECHNOLOGY DIGEST OF TECHNICAL PAPERS, 78–79 (2016) (Ex. 1007). 4 Nam, US 2015/0003169 A1, published Jan. 1, 2015 (Ex. 1006). undisputed proposed definition appears to be consistent with the cited prior art and the disclosure of the ’342 patent, and we adopt it for purposes of this Decision. See Okajima v. Bourdeau, 261 F.3d 1350, 1355 (Fed. Cir. 2001) (explaining that specific findings regarding ordinary skill level are not required “where the prior art itself reflects an appropriate level and a need for testimony is not shown” (quoting Litton Indus. Prods., Inc. v. Solid State Sys. Corp., 755 F.2d 158, 163 (Fed. Cir. 1985))).” slip op. at 6

    • Claim Construction › Threshold & procedure › Whether a term needs construction (O2 Micro)No construction neededOther

      “customary meaning of such claim as understood by one of ordinary skill in the art and the prosecution history pertaining to the patent.” 37 C.F.R. § 42.100(b). Under this standard, claim terms are generally given their plain and ordinary meaning as would have been understood by a person of ordinary skill in the art at the time of the invention and in the context of the entire patent disclosure. Phillips v. AWH Corp., 415 F.3d 1303, 1313 (Fed. Cir. 2005) (en banc). Only those terms in controversy need to be construed, and only to the extent necessary to resolve the controversy. Realtime Data, LLC v. Iancu, 912 F.3d 1368, 1375 (Fed. Cir. 2019). Based on the record before us, we determine that no claim term requires express construction for purposes of this Decision.” slip op. at 7

    • Obviousness (§103) › Objective indicia / secondary considerationsNot reached

      “techniques for removing fast charges during a read-verification operation.” Prelim. Resp. 28. In order to rely on inherency to establish the existence of a missing claim limitation in an obviousness analysis, “the limitation at issue necessarily must be present, or the natural result of the combination of elements explicitly disclosed by the prior art.” PAR Pharma, Inc. v. TWi Pharms., Inc., 773 F.3d 1186, 1195–96 (Fed. Cir. 2014). Petitioner, therefore, must show that fast charges of the target memory cell necessarily are removed during the first time period of Seo’s read-verification operation. On this record, neither Petitioner nor Dr. Liu sufficiently demonstrates that Seo’s read-verification operation would necessarily remove fast charges of the target memory cell during the first time period.” slip op. at 12

    Claim construction§ 102 anticipation§ 103 obviousnesscites Phillips
    Patents in suitUS 11,600,342
  • PTAB · Dec 2, 2024 · IPR2024-00793 · APJ Jo-Anne M Kokoski · IPR · Institution

    The Board denied institution because Micron did not show a reasonable likelihood that claims 1–6 and 8–20 would have been obvious over the asserted combinations.

    RulingsInstitution decision
    • PTAB / AIA Trials › Institution threshold (reasonable likelihood / more likely than not)Institution denied meritsInstitution denied

      “Institution of an inter partes review is authorized by statute when “the information presented in the petition . . . and any response . . . shows that there is a reasonable likelihood that the petitioner would prevail with respect to at least 1 of the claims challenged in the petition.” 35 U.S.C. § 314 (2018); see also 37 C.F.R. § 42.4 (2023). For the reasons discussed below, we deny the Petition and do not institute an inter partes review.” slip op. at 2

    • Skill levelSkill level petitioner adoptedDecided for petitioner

      “(“POSITA”) would have had “a master’s degree in electrical engineering or a similar discipline” with “4–5 years of professional experience working with (e.g., researching, designing, or developing) NAND flash memory devices (including issues relating to the operation, e.g., reading of said devices), or an equivalent level of skill, knowledge, and experience (e.g., an advanced degree may replace some of the professional experience).” Pet. 21–22 (citing Ex. 1003 ¶¶ 35–39). At this stage of the proceeding, Patent Owner neither responds to Petitioner’s proposed definition, nor provides a definition of its own. See generally, Prelim. Resp. Petitioner’s undisputed proposed definition appears to be consistent with the cited prior art and the disclosure of the ’342 patent, and we adopt it for purposes of this Decision. See Okajima v. Bourdeau, 261 F.3d 1350, 1355 (Fed. Cir. 2001) (explaining that specific findings regarding ordinary skill level are not required “where the prior art itself reflects an appropriate level and a need for testimony is not shown” (quoting Litton Indus. Prods., Inc. v. Solid State Sys. Corp., 755 F.2d 158, 163 (Fed. Cir. 1985))).” slip op. at 7

    • Claim Construction › Threshold & procedure › Whether a term needs construction (O2 Micro)No construction neededOther

      “B. Claim Construction We construe each claim “in accordance with the ordinary and customary meaning of such claim as understood by one of ordinary skill in the art and the prosecution history pertaining to the patent.” 37 C.F.R. § 42.100(b). Under this standard, claim terms are generally given their plain and ordinary meaning as would have been understood by a person of entire patent disclosure. Phillips v. AWH Corp., 415 F.3d 1303, 1313 (Fed. Cir. 2005) (en banc). Only those terms in controversy need to be construed, and only to the extent necessary to resolve the controversy. Realtime Data, LLC v. Iancu, 912 F.3d 1368, 1375 (Fed. Cir. 2019). Based on the record before us, we determine that no claim term requires express construction for purposes of this Decision.” slip op. at 7

    • Obviousness (§103) › Motivation to combine / reasonable expectation of success › HindsightMotivation not foundNot shown unpatentable

      “large lateral electric field generated at the edge of the cell, there is a greater likelihood of fast charge loss, and because Seo also creates a large lateral electric field, it would have been obvious to apply Seo’s voltages to Choi’s charge-trap memory to remove the fast charges. We explain above, however, that Petitioner does not sufficiently establish that Seo’s applied voltages necessarily remove fast charges as required by claim 1.” slip op. at 14

    Claim construction§ 103 obviousnesscites Phillips
    Patents in suitUS 11,600,342
  • PTAB · Nov 27, 2024 · IPR2024-00791 · APJ Kimberly Mcgraw · IPR · Institution

    The Board instituted IPR on claims 8, 9, 11, and 12 for all asserted Toyama obviousness arguments, finding a reasonable likelihood of success on the First Exemplary Structure argument.

    RulingsInstitution decision
    • PTAB / AIA Trials › Institution threshold (reasonable likelihood / more likely than not)InstitutedInstituted

      “Institution of an inter partes review is authorized by statute when “the information presented in the petition . . . and any response . . . shows that there is a reasonable likelihood that the petitioner would prevail with respect to at least 1 of the claims challenged in the petition.” 35 U.S.C. § 314 (2018); see also 37 C.F.R. § 42.4 (2023). For the reasons discussed below, we determine that at least one of Petitioner’s arguments regarding Toyama (alternative argument 21) establishes a reasonable likelihood of prevailing with respect to the unpatentability of at least one claim of the ’806 patent. Accordingly, we institute an inter partes review of claims 8, 9, 11, and 12 of the ’806 patent on all of Petitioner’s asserted arguments regarding Toyama.” slip op. at 2

    • Obviousness (§103) › Motivation to combine / reasonable expectation of successMotivation foundReasonable expectation foundInstituted

      “the proceeding that a POSITA would have modified Toyama to provide a multi-plane flash memory device that could issue a read command on multiple planes simultaneously, thereby improving the throughput of program operations and the performance of NAND based systems. Id. at 68–75 (citing, inter alia, Ex. 1023, 144; Ex. 1014, 308, 313–314). Petitioner also provides sufficient arguments and evidence that this solution was quite common because power issues related to this kind of solution are still manageable inside the chip and optimized versus two separate NAND devices active at the same time. Id. at 75 (citing Ex. 1025, 44–45, 171; Ex. 1003 ¶¶ 141–147); see also Ex. 1003 ¶¶ 141–147 (citing, inter alia, Ex. 1023, 144, 247, Fig. 6.1; Ex. 1024, 13:37–44; Ex. 1014, 308, 313–314; Ex. 1025, 42, 44–45, 171). POSITA would have had a reasonable expectation of success in implementing multiple planes of Toyama’s First Exemplary Structure in the hd1 direction because NAND devices having multiple planes existed for many years before the priority date of the ’806 patent and that implementation of such a structure would have been straightforward as it merely applies a known technique (implementing multiple planes of NAND flash memory array) to a known device (Toyama’s first exemplary structure) to yield predictable results (a NAND flash device with improved performance). Pet. 69–77 (citing, inter alia, Ex. 1003 ¶¶ 148–151); see also Ex. 1003 ¶¶ 148–151 (stating a POSITA would have known how to implement multiple planes in Toyama’s memory device using the same approach discussed earlier in the declaration); see also Ex. 1003 ¶¶ 141–147 (citing, inter alia, Ex. 1023, 144, 247, Fig. 6.1; Ex. 1024, 13:37–44; Ex. 1014, 308, 313–314; Ex. 1025, 42, 44–45, 171). Accordingly, at this stage of the proceeding, Petitioner sufficiently shows that a POSITA would have had reason to modify Toyama’s First Exemplary Structure to repeat portions of the device in the hd1 direction in order, inter alia, to improve performance of the device and would have done so with a reasonable expectation of success, and that such a modification results in a TAC region formed between first and second channel regions as required by claim element [8.G], notwithstanding Patent Owner’s arguments to the contrary, which raise issues best resolved on a full record.” slip op. at 28

    • PTAB / AIA Trials › Discretionary denial › §325(d) same art / argumentsInstitution denied 325dDecided for petitioner

      “2. Part One of the Advanced Bionics Framework Patent Owner argues, and Petitioner does not dispute, that part one of the Advanced Bionics framework is met because Toyama was cited on an Examiner initialed Information Disclosure Statement (“IDS”) and therefore was previously presented to the Office. See Pet. 10; Prelim. Resp. 18–19. Accordingly, we move on to part two of the framework.” slip op. at 36

    § 103 obviousnessDiscretionary denialcites Phillips
    Patents in suitUS 10,937,806
  • PTAB · Nov 19, 2024 · IPR2024-00855 · APJ Grace Karaffa Obermann · IPR · Institution

    The Board denied institution of IPR challenging claims 1–5 and 8–14, exercising § 314(a) discretion under Fintiv because the factors favored denial and the merits were not compelling.

    RulingsInstitution decision
    • PTAB / AIA Trials › Discretionary denial › Fintiv (parallel litigation)Institution denied fintivDenied

      “We consider the following factors to assess “whether efficiency, fairness, and the merits support the exercise of authority to deny institution in view of an earlier trial date in the parallel proceeding.” 1. whether the court granted a stay or evidence exists that one may be granted if a proceeding is instituted; 2. proximity of the court’s trial date to the Board’s projected statutory deadline for a final written decision; 3. investment in the parallel proceeding by the court and the parties; 4. overlap between issues raised in the petition and in the parallel proceeding; 5. whether the petitioner and the defendant in the parallel proceeding are the same party; and 6. other circumstances that impact the Board’s exercise of discretion, including the merits. Fintiv, Paper 11 at 5–6.” slip op. at 7

    • PTAB / AIA Trials › Institution threshold (reasonable likelihood / more likely than not)Institution denied fintivInstitution denied

      “We have authority to institute an inter partes review where a petitioner shows a reasonable likelihood of prevailing with respect to at least one challenged claim. 35 U.S.C. § 314(a); 37 C.F.R. § 42.4(a). Under appropriate circumstances, however, we may exercise our discretion under Section 314(a) and deny review without regard to whether the petitioner has met that threshold. Trial Practice Guide,3 64; see 84 Fed. Reg. 64,280 (Nov. 21, 2019). For reasons that follow, we exercise our discretion under Section 314(a) and do not institute an inter partes review.” slip op. at 2

    • Claim Construction › Threshold & procedure › Whether a term needs construction (O2 Micro)Not reached

      “On this record, we discern a genuinely-disputed issue surrounding the correct construction of the first wavelength spectrum limitation. Specifically, a question arises whether the first wavelength spectrum limitation can be 13 Neither party identifies the litigation involving Petitioner’s real parties-ininterest as related to this proceeding. Pet. 1; Paper 5, 1. That litigation, however, involves assertions of the ’547 patent claims against Samsung Electronics Co., Ltd., and Samsung Electronics America, Inc. Ex. 2053, 1, 8; see Pet. 1 (identifying those entities as Petitioner’s real parties-in-interest). met by a portion of the radiation emitted by the organic layer (as argued by Petitioner); or instead, the first wavelength spectrum limitation refers to the entirety of the radiation emitted by the organic layer (as argued by Patent Owner). Compare Pet. 23–25, 57–58, with Prelim. Resp. 64–74. To be clear, we need not and, therefore, do not resolve the correct construction of the first wavelength spectrum limitation. It is enough for us to observe, on this record, that a genuinely-disputed issue surrounds this issue of claim construction. As explained in the next section, that dispute casts doubt upon whether Petitioner shows sufficiently, for purposes of trial institution, that the prior art suggests the filter transparency limitation.” slip op. at 15

    • Obviousness (§103) › Motivation to combine / reasonable expectation of successNot reached

      “14 Petitioner belatedly suggests that an ordinarily skilled artisan would have been prompted to replace the emitter material employed by the prior art (namely, BCzVBi in DPvBi) with a different, but undisclosed, emitter material having “no significant emission at wavelengths above 500 nm.” Opp. Supp. Br. 2 (citing Ex. 2010 ¶ 43); see Reply 3–4 (same). That argument is not presented in the Petition, much less supported in the Petition by a rationale to combine. See Pet. 16–17, 48–50 (mapping the organic layer sequence of claim 1 to the organic layer sequence of Igarashi or Shiotani, which both employ BCzVBi in DPvBi as the emitter material (Ex. 1004 ¶ 88; Ex. 1005, 5/12)).” slip op. at 17

    Claim construction§ 103 obviousnessDiscretionary denial
    Patents in suitUS 8,314,547
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