PTAB
Advanced fields
170 decisions · 613msnewest first
  • PTAB · Sep 2, 2026 · PGR2025-00021 · APJ Kimberly Mcgraw · PGR · Final written decision

    Claims 1, 3–7, and 12–20 are unpatentable: the Board found the asserted Kim, Kim–Yang, Lee, and Lee–Haller obviousness grounds proved, but not Lee–Park.

    RulingsFinal written decision
    • Skill levelSkill level petitioner adoptedDecided for petitioner

      “(e.g., an advanced degree may substitute for professional experience).” Pet. 21 (citing Ex. 1003 ¶¶ 36–37). Petitioner further contends that a “POSITA would also have been aware of and generally knowledgeable about 3D memory’s structure, its component parts, and how it operates.” Id. Patent Owner does not dispute Petitioner’s definition of a POSITA. PO Resp. 9. Based on our review of the complete record, we adopt Petitioner’s uncontested definition of a POSITA.” slip op. at 6

    • Claim Construction › Intrinsic evidence (Phillips canons) › Plain and ordinary meaning to a POSITAPlain and ordinary meaningDecided for petitioner

      “The plain language of claim element [1.A] recites “wherein the first material layer is disposed over a first portion of the second material layer;” and claim element [1.B] recites “a landing pad disposed over a second portion of the second material layer.” Thus, the plain language of the claim merely recites that the first material layer is disposed over a first potion of the second material layer and the landing pad is disposed over a second portion of the second material layer. The plain language does not define what constitutes the first or second portions of the second material layer or define the first or second portions of the material layer by what is disposed above the layers. We agree with Petitioner that the term “portion” has a straightforward plain and ordinary meaning: a “part” of a larger whole. Pet. 5 (citing Ex. 1077, 406 (defining “portion” as “a part of a whole”)). The ’838 patent itself repeatedly uses the term “portion” this way. Ex. 1001, 5:40–43 (discussing both “an upper portion” and “lower portion” of a “staircase”), 5:66–6:1 (referencing “a portion of a top surface of a layer”); see also 4:39– 40, 7:15–17, 8:20–33, 8:34–65, 11:60–64, 12:38–59. Thus, we understand that the first and second portions of the second material layer are portions of (i.e., a part of the whole) second material layer. Neither the claims nor the Specification define what can constitute a first portion or a second portion of a second material layer.” slip op. at 11

    • Expert testimonyPatent owner expert creditedPetitioner expert discountedDecided for patent owner

      “Dr. Giapis, argues Petitioner’s proposed modification of Lee requires a POSITA to (1) start with an oxide-based insulating layer 22 as shown in Figure 5B of Lee, (2) introduce an oxidant gas into the adjacent openings, and (3) oxidize a surface that is already oxide-based to form a curved surface. PO Resp. 78–81. Patent Owner provides credible evidence supporting its argument that a POSITA would not have been motivated to make these changes to Lee, as they are technically infeasible. Id. at 79 (citing Ex. 2019 ¶¶ 191–208). Dr. Giapis credibly explains that in Park’s process, an oxygen gas would be used to oxidize the silicon nitride or polysilicon, but “introducing such an oxidant into the openings of Lee’s structure above will not promote further oxidation to the existing oxide the relevant region . . . so nothing remains to be oxidized.” Ex. 2019 ¶¶ 192–193. We credit Dr. Giapis testimony that “[i]t is not possible to further oxidize a solid oxide material with oxygen gas as in Park. That is why Park’s thermal oxidation process is performed on silicon nitride or polysilicon, which are not oxides to begin with but they can be oxidized to form silicon dioxide.” Id. ¶ 193 (citing Ex. 2028 (Plummer) at 345–350). According to Dr. Giapis, a POSITA would have understood this and not expected the combination of Lee and Park to achieve any change in shape or any rounding in Lee’s Figure 5B. Ex. 2019 ¶ 193.” slip op. at 60

    • Obviousness (§103) › Motivation to combine / reasonable expectation of successMotivation not foundReasonable expectation not foundNot shown unpatentable

      “Patent Owner, however, with persuasive supporting testimony from Dr. Giapis, argues Petitioner’s proposed modification of Lee requires a POSITA to (1) start with an oxide-based insulating layer 22 as shown in Figure 5B of Lee, (2) introduce an oxidant gas into the adjacent openings, and (3) oxidize a surface that is already oxide-based to form a curved surface. PO Resp. 78–81. Patent Owner provides credible evidence supporting its argument that a POSITA would not have been motivated to make these changes to Lee, as they are technically infeasible. Id. at 79 (citing Ex. 2019 ¶¶ 191–208). Dr. Giapis credibly explains that in Park’s process, an oxygen gas would be used to oxidize the silicon nitride or polysilicon, but “introducing such an oxidant into the openings of Lee’s structure above will not promote further oxidation to the existing oxide the relevant region . . . so nothing remains to be oxidized.” Ex. 2019 ¶¶ 192–193. We credit Dr. Giapis testimony that “[i]t is not possible to further oxidize a solid oxide material with oxygen gas as in Park. That is why Park’s thermal oxidation process is performed on silicon nitride or polysilicon, which are not oxides to begin with but they can be oxidized to form silicon dioxide.” Id. ¶ 193 (citing Ex. 2028 (Plummer) at 345–350). According to Dr. Giapis, a POSITA would have understood this and not expected the combination of Lee and Park to achieve any change in shape or any rounding in Lee’s Figure 5B. Ex. 2019 ¶ 193.” slip op. at 60

    Patent outcomesUS 12,010,838 unpatentable
    Claim construction§ 103 obviousnesscites Phillips
    Patents in suitUS 12,010,838
  • PTAB · Jul 21, 2026 · IPR2025-00190 · APJ Kimberly Mcgraw · IPR · Final written decision

    Claims 1, 3–11, 13, and 14 were not shown unpatentable because Dong did not disclose the claimed vertical wordline arrangement, and the proposed 3D NAND combination lacked support for motivation and reasonable expectation of success.

    RulingsFinal written decision
    • Claim Construction › Intrinsic evidence (Phillips canons) › Plain and ordinary meaning to a POSITATerm construed board ownDecided for patent owner

      “understanding that the claim term “from bottom to top” refers to the vertical arrangement of word lines in the memory portions from bottom to top and not from source end to drain end, as asserted by Petitioner. Inst. Dec. 17. In other words, the claim terms describing the first and second portions having word lines “from top to bottom” refer to the relative vertical location of the word lines within the memory portions and not to location of the word lines relative to the source or drain. Our construction is based on the plain and ordinary meaning of the express language of the independent claims, which states that the second memory portion is formed either above or below the first memory portion. The forming of one memory portion above or below another portion establishes a top and bottom in relation to those portions. For example, claim 5 is directed to a “program method of memory” that requires a second portion formed above the first portion. A second memory portion that is formed above a first memory portion is on top relative to the first portion. Similarly, claims 1 and 1 and 11, which recite a memory having a second portion formed below a first portion, establish that the second portion is on the bottom relative to the first portion. Thus, the claim language itself establishes the vertical locations of the memory portions relative to each other (e.g., a second memory portion that is above the first portion is on top, relative to the first portion). It follows that claim terms referring to the top and bottom of word lines within the memory portions also refer to relative vertical locations of the word lines within the memory portions. Thus, we understand the plain and ordinary meaning of claim” slip op. at 13

    • Claim Construction › Intrinsic evidence (Phillips canons) › Preamble limiting or notPreamble limitingDecided for patent owner

      “In our Decision, we treated the preambles of claims 5 and 11 as limiting, noting that these preambles provide antecedent basis for the word line limitations recited in the body of their respective claim. Dec. 14–15, 8. Neither party disputes that the preambles of claims 5 and 11 are limiting. See PO Resp. 34–35 (agreeing that the preambles are limiting); see generally Reply 1–6 (not disputing that the preambles are limiting). We maintain our construction of the preambles in this Decision.” slip op. at 11

    • Skill levelSkill level petitioner adoptedDecided for petitioner

      “we consider the level of ordinary skill at the time of filing. 35 U.S.C. § 103; see also Graham, 383 U.S. at 17 (discussing pre-AIA obviousness). Petitioner contends that a person of ordinary skill in the art (“POSITA”) would have had a had a bachelor’s degree in electrical engineering or a similar discipline, along with 2–3 years of professional experience working with (e.g., researching, designing, or teaching) NAND memory devices (including issues relating to the operation, e.g., programming, of said devices), or an equivalent level of skill, knowledge, and experience (e.g., an advanced degree may replace some of the professional experience). Pet. 22 (citing Ex. 1004 ¶¶ 40–42). Petitioner also asserts that a POSITA would have been aware of and generally knowledgeable about NAND memory’s structure and fabrication, its component parts, how it operates, and how it is controlled. Id. at 22–23 (citing Ex. 1004 ¶ 41). In the Institution Decision, we adopted the assessment offered by Petitioner, which Patent Owner did not contest. Inst. Dec. 13. Following institution, Patent Owner stated it does not dispute Petitioner’s definition of a POSITA. PO Resp. 9 (citing Khatri Dec. ¶¶ 42–47). Because Petitioner’s definition of the level of skill in the art appears consistent with the ’941 patent and the asserted prior art, we maintain it for purposes of this Final Written Decision. See Okajima v. Bourdeau, 261 F.3d 1350, 1355 (Fed. Cir 2001).” slip op. at 9

    • Expert testimonyPatent owner expert creditedOther

      “We disagree and find that Dong’s Figure 5a does not depict wordlines in a physical vertical orientation, but rather depicts voltage diagrams. We agree with Patent Owner’s argument, supported by persuasive testimony by Dr. Khatri, that a POSITA would have understood that Dong’s voltage charts (e.g., Fig. 5a) simply represent which voltages are applied to which word lines and do not depict the physical orientation of the wordlines. See, e.g., Ex. 2028 ¶ 171 (citing Ex. 1005 ¶ 20; Ex. 1009 ¶¶ 52–54). As Dr. Khatri explains, Dong Figures 5a–5h depict different examples of self-boosting modes showing voltages applied differently to the wordlines and are not intended to depict the physical orientation of these word lines. Ex. 2028 ¶ 171; see also Sur-reply 11–12 (citing Ex. 1005 ¶¶ 47, 65, 63–67; Ex. 2028 ¶¶ 177–186). We agree with Dr. Kahtri’s persuasive testimony that a POSITA would understand that Figures 5a–5h are illustrated vertically, but do not represent the actual physical arrangement of the word lines in memory, which are shown to be horizontal in Dong’s Figure 4. See, e.g., Ex. 2028 ¶ 172 (citing Ex. 1005 ¶¶ 20, 45, 47, 87).” slip op. at 24

    Patent outcomesUS 11,568,941 not shown unpatentable
    Claim construction§ 102 anticipation§ 103 obviousnesscites Phillips · KSR · Graham
    Patents in suitUS 11,568,941
  • PTAB · Jun 30, 2026 · IPR2025-00175 · APJ Jo-Anne M Kokoski · IPR · Final written decision

    Claims 1–17 were not shown unpatentable because Petitioner failed to establish that Usui’s interconnect structure or Yu’s metal gate stacks satisfy the construed “electrode stack” limitation.

    RulingsFinal written decision
    • Skill levelSkill level petitioner adoptedDecided for petitioner

      “(“POSITA” or “POSA”) would have had “at least a four-year degree in electrical engineering or a closely related field, and at least two years of experience in semiconductor device design,” and “[a]dditional education could substitute for professional experience and vice versa.” Pet. 6 (citing Ex. 1002 ¶¶ 80–82). Patent Owner does not dispute Petitioner’s proposed level of ordinary skill. PO Resp. 1–76. Neither party explains why the outcome of this case would be affected by the adoption of the proffered definition of a person of ordinary skill in the art. In the Institution Decision, we adopted the assessment offered by Petitioner. Dec. 6–7. Because Petitioner’s definition of the level of skill in the art is consistent with the ’562 patent and the asserted prior art, we maintain Petitioner’s definition for purposes of this Final Written Decision. See Okajima v. Bourdeau, 261 F.3d 1350, 1355 (Fed. Cir 2001).” slip op. at 9

    • Claim Construction › Intrinsic evidence (Phillips canons) › Plain and ordinary meaning to a POSITATerm construed board ownDecided for petitioner

      “comprises the recited metals and has the recited thickness, which forms an electrical contact for use on a semiconductor device generally or a group III- V semiconductor in particular. This is consistent with our determination that “electrode stack” is a conductor that provides a path for current entering or leaving a medium such as a semiconductor device We disagree with Patent Owner that “electrode stack” as used in the challenged claims should be limited to the specific electrodes shown in the embodiments described in the Specification. See PO Resp. 4–9. Although the Specification describes embodiments using source, drain, and Schottky gate electrodes as electrical contacts, we see no reason to construe the term “electrode stack” itself to be limited to these components as Patent Owner proposes. Claims 1 and 13 expressly recite that electrode stacks comprise the claimed “electrical contact,” without expressly including or precluding any specific type of electrode. Ex. 1001, 5:54–63, 6:37–47. The Federal Circuit advises that the Specification “is not a substitute for, nor can it be used to rewrite, the chosen claim language. ‘Specifications teach. Claims claim.’” SuperGuide, 358 F.3d at 875 (quoting SRI Int’l v. Matsushita Elec. Corp. of Am., 775 F.2d 1107, 1121 n.14 (Fed. Cir. 1985) (en banc)). The Specification does teach electrical contacts that include source, drain, and Schottky gate electrodes, but claims 1 and 13 are directed to electrical contacts that are not expressly so limited. Patent Owner’s proposed construction would effectively rewrite the claim by adding limitations, which we decline to do under the guise of claim construction. See id. (“Though understanding the claim language may be aided by the explanations contained in the written description, it is important not to import into a claim limitations that are not a part of the claim.”). In view of the foregoing, we construe the claim term “electrode stack” to mean “a conductor that provides a path for current entering or leaving a medium such as a semiconductor device.”” slip op. at 17

    • Expert testimonyPetitioner expert discountedDecided for patent owner

      “that the identified layers in Usui’s interconnect metallurgy structure form an “electrode stack including a plurality of metal layers and a capping layer formed over said plurality of metal layers” as recited in claim 1. See Pet. 11–12 (citing Ex. 1002 ¶¶ 89–91). Neither Petitioner nor Dr. Zhao, however, provide adequate explanation or evidence as to why Usui’s interconnect metallurgy structure forms an “electrode stack,” i.e., a conductor that provides a path for current entering or leaving a medium such as a semiconductor device. Dr. Zhao’s testimony merely repeats the disclosures in Usui and concludes, without further technical detail, explanation, or reference to objective evidence, that Usui’s Figure 8 discloses an electrode stack. Ex. 1002 ¶¶ 89–91. Dr. Zhao’s testimony sets forth Petitioner’s conclusory assertions as though they are facts, rather than setting forth facts and evidence in support of those assertions. Compare id. with Pet. 11–12. Absent underlying facts or evidence to support Dr. Zhao’s opinion, the cited testimony “adds little to the conclusory assertion for which it is offered to support, and is entitled to little weight.” Xerox Corp. v. Bytemark, Inc., IPR2022-00624, Paper 9 at 15 (PTAB Aug. 24, 2022) (precedential). In contrast, Patent Owner’s declarant Dr. Piner testifies, with evidentiary support, that interconnects (such as Usui’s interconnect metallurgy structure) and electrical contacts (such as that claimed in the ’562 patent) are not the same thing. See Ex. 2024 ¶¶ 63–70. For example, Dr. Piner explains: In other words, not all metals in a semiconductor device have the same purpose and could not be said to be interchangeable. By August 2009 it was well known to a POSA how to discern if a metal component in a transistor is an interconnect or serves as an electrical contact such as a gate contact or ohmic contact, based on the structure and functionality of the metal component. For example, interconnects are made up of metal strips and are deposited on insulators. EX-1011 (Mishra) at 216. Interconnects are low resistance conductors that can carry very high current densities. Id., 216, 217. Unlike Schottky contacts and ohmic contacts, interconnects do not provide non-linear IV response like Schottky contacts nor inject electrons and holes into semiconductors like ohmic contacts. Id., 218. As many of the references cited by Dr. Zhao illustrate, electrical contacts had their own highly complex design challenges. EX-1008 (Pearton), 41-59 (Pages 53-71 of 383) (discussing electrical contacts); EX-1017 (Kramer), 11-126 (Pages 18-130 of 151) (same). And while Dr. Zhao cites these as supporting a POSA’s knowledge of an electrical contact, none of these references describe electrical contacts as interconnects. Id. ¶ 71. Dr. Piner further testifies that Usui’s interconnect metallurgy structure is an interconnect, and not an electrical contact, because “Usui states that ‘[t]he structures fabricated by the process of the present invention are especially useful for forming electrical connections or wiring such as between active and/or passive devices of an integrated circuit structure.’” Id. ¶ 148 (citing Ex. 1004, 1:11–14) (alteration in original); see also id. ¶¶ 150– 151 (Dr. Piner testifying that Usui’s interconnect metallization structure is not an “electrode stack” under a broad definition of electrode). Dr. Piner’s testimony in this regard rebuts Petitioner’s and Dr. Zhao’s conclusory assertions to the contrary.” slip op. at 21

    • Novelty / Anticipation (§102) › Anticipation standard (single reference, every element)Not shown unpatentableNot shown unpatentable

      “conductor that provides a path for current entering or leaving a medium such as a semiconductor device.” Thus, Petitioner must show that Usui’s layers 13–15, 18, and 19 provide a path for current entering or leaving a medium such as a semiconductor device. After reviewing the complete trial record, we are not persuaded that Petitioner has done so. Petitioner relies on the testimony of Dr. Zhao to support its contention that the identified layers in Usui’s interconnect metallurgy structure form an “electrode stack including a plurality of metal layers and a capping layer formed over said plurality of metal layers” as recited in claim 1. See Pet. 11–12 (citing Ex. 1002 ¶¶ 89–91). Neither Petitioner nor Dr. Zhao, however, provide adequate explanation or evidence as to why Usui’s interconnect metallurgy structure forms an “electrode stack,” i.e., a conductor that provides a path for current entering or leaving a medium such as a semiconductor device. Dr. Zhao’s testimony merely repeats the disclosures in Usui and concludes, without further technical detail, explanation, or reference to objective evidence, that Usui’s Figure 8 discloses an electrode stack. Ex. 1002 ¶¶ 89–91. Dr. Zhao’s testimony sets forth Petitioner’s conclusory assertions as though they are facts, rather than setting forth facts and evidence in support of those assertions. Compare id. with Pet. 11–12. Absent underlying facts or evidence to support Dr. Zhao’s opinion, the cited testimony “adds little to the conclusory assertion for which it is offered to support, and is entitled to little weight.” Xerox Corp. v. Bytemark, Inc., IPR2022-00624, Paper 9 at 15 (PTAB Aug. 24, 2022) (precedential).” slip op. at 21

    Patent outcomesUS 8,686,562 not shown unpatentable
    Claim construction§ 102 anticipation§ 103 obviousnesscites Phillips · KSR · Graham
    Patents in suitUS 8,686,562
  • PTAB · Jun 12, 2026 · IPR2025-00094 · APJ Christopher M Kaiser · IPR · Final written decision

    Claims 1–16 were not shown unpatentable under any asserted obviousness ground because Petitioner failed to establish the proposed modifications and combinations.

    RulingsFinal written decision
    • Skill levelSkill level petitioner adoptedDecided for petitioner

      “Petitioner contends that one of ordinary skill in the art “would have possessed at least a four-year degree in electrical engineering or a closely related field, and at least two years of experience in semiconductor device design.” Pet. 5 (citing Ex. 1003 ¶¶ 67–69). Petitioner also argues that “[a]dditional education could substitute for professional experience and vice versa.” Id. Patent Owner does not dispute Petitioner’s proposed level of ordinary skill. PO Resp. 1–76. Neither party explains why the outcome of this case would be affected by the adoption of the proffered definition of a person of ordinary skill in the art. Accordingly, and because it appears to be consistent with the ’003 patent and the asserted prior art, we adopt Petitioner’s assessment of the level of ordinary skill in the art. See Okajima v. Bourdeau, 261 F.3d 1350, 1355 (Fed. Cir. 2001).” slip op. at 7

    • Claim Construction › Threshold & procedure › Whether a term needs construction (O2 Micro)No construction neededOther

      “Neither party proposes construing any claim terms. Pet. 6; Prelim. Resp. 1–76. In addition, as discussed below, we are able to determine the outcome of this proceeding without expressly construing any terms. Thus, we do not construe any terms for the purposes of this Decision. See Realtime Data, LLC v. Iancu, 912 F.3d 1368, 1375 (Fed. Cir. 2019) (“The Board is required to construe ‘only those terms . . . that are in controversy, and only to the extent necessary to resolve the controversy.’” (quoting Vivid Techs., Inc. v. Am. Sci. & Eng’g, Inc., 200 F.3d 795, 803 (Fed. Cir. 1999))).” slip op. at 8

    • Obviousness (§103) › Motivation to combine / reasonable expectation of successMotivation not foundNot shown unpatentableNot shown unpatentable

      “challenged claim. Unigene Labs., Inc. v. Apotex, Inc., 655 F.3d 1352, 1360 (Fed. Cir. 2011). “This is so because inventions in most, if not all, instances rely upon building blocks long since uncovered, and claimed discoveries almost of necessity will be combinations of what, in some sense, is already known.” KSR, 550 U.S. at 418–419. On the other hand, an obviousness analysis “need not seek out precise teachings directed to the specific subject matter of the challenged claim, for a court can take account of the inferences and creative steps that a person of ordinary skill in the art would employ.” Id. at 418; accord In re Translogic Tech., Inc., 504 F.3d 1249, 1259 (Fed. Cir. 2007). However, a petitioner cannot satisfy its burden of proving obviousness by employing “mere conclusory statements.” In re Magnum Oil Tools Int’l, Ltd., 829 F.3d 1364, 1380 (Fed. Cir. 2016). Instead, a petitioner must articulate a reason why a person of ordinary skill in the art would have combined or modified the prior art references. In re NuVasive, Inc., 842 F.3d 1376, 1382 (Fed. Cir. 2016); see also Metalcraft of Mayville, Inc. v. The Toro Co., 848 F.3d 1358, 1366 (Fed. Cir. 2017) (“In determining whether there would have been a motivation to combine prior art references to arrive at the claimed invention, it is insufficient to simply conclude the combination would have been obvious without identifying any reason why a person of skill in the art would have made the combination.”); Belden Inc. v. Berk-Tek LLC, 805 F.3d 1064, 1073 (Fed. Cir. 2015) (“[O]bviousness concerns whether a skilled artisan not only could have made but would have been motivated to make the combinations or modifications of prior art to arrive at the claimed invention.”) (citing InTouch Techs., Inc. v. VGO Commc’ns, Inc., 751 F.3d 1327, 1352 (Fed. Cir. 2014)). In arguing for the obviousness of claim 1 over the combination of Bonn and Mizuta, Petitioner argues that a person of ordinary skill in the art would have modified Bonn to perform high-frequency signal amplification. Pet. 19–25. In particular, Petitioner argues that a person of ordinary skill in the art “would have found it obvious to modify the circuit of Figure 1 [of Bonn] and use Figure 7’s structure for high frequency signal amplification in place of mixer 40,” followed by additional modifications to the circuit of Figure 1. Id. at 22–25. These additional modifications include removing LO port 55, removing FET 20 (along with voltage source 80, capacitors 16, 26, and 34, resistor 18, and inductors 22 and 24), removing capacitor 34 and shorting gate structure 324 to ground, and removing resistors 46 and 48 and shorting terminal 51 to ground. Id. According to Petitioner, the motivation for these modifications was that “Bonn . . . teaches using its dual gate structures for signal amplification without signal mixing.” Id. at 22 (citing Ex. 1006, 11:26–37). On the record developed at trial, we disagree. Bonn does, as Petitioner argues, teach that “the dual gate FET structure of the present invention can be tailored to provide superior performance over the prior art dual gate FET structures in high frequency signal mixing as well as other applications such as high frequency signal amplification.” Ex. 1006, 11:33–37. But the tailoring that Bonn refers to relates to changes to the structure of the field-effect transistor itself, not to the circuitry surrounding that transistor. Id. (teaching that the reason that “the dual gate FET structure of the present invention can be tailored” is that “the parameters such as gate width, dopant concentration, and channel depth, under each gate of the dual gate FET are individually adjusted for optimum performance”). Thus, although Bonn might have motivated a person of ordinary skill in the art to have made changes to the dual-gate FET itself, we are not persuaded that it would have motivated the additional changes to the circuit of Bonn’s Figure 1.” slip op. at 11

    • Strike new argumentNew argument disregardedDecided for patent owner

      “Mishra’s Figure 5 is a second gate in favor of a new position. Petitioner’s new argument is that a person of ordinary skill in the art would have found it obvious to connect the field plate of Mishra’s Figure 5 to the source instead of the gate, converting the field plate into a second gate. Compare Pet. 83 (equating “drain side gate” with “field plate 66, Figure 5”), 86–88 (identifying field plate 66 as a “second gate”), with Reply 21–22 (identifying only the embodiment of Mishra’s Figure 10 as a source-connected field plate), 22–23 (arguing that Mishra teaches that the Figure 5 embodiment “could be arranged as ‘a single transistor with a dual gate structure’”). Although “the introduction of new evidence in the course of the trial is to be expected in inter partes review trial proceedings,” Genzyme Therapeutic Prods. LP v. Biomarin Pharm. Inc., 825 F.3d 1360, 1366 (Fed. Cir. 2016), the shifting of arguments is not, Wasica Fin. GmbH v. Cont’l Auto. Sys., Inc., 853 F.3d 1272, 1286 (Fed. Cir. 2017). Accordingly, Petitioner’s change of arguments here is inappropriate. Moreover, even if we were to consider Petitioner’s inappropriate new argument, we would conclude that Petitioner does not support the argument with sufficient evidence. “Whether [an obviousness ground] is based on combining disclosures from multiple references, combining multiple embodiments from a single reference, or selecting from large lists of elements in a single reference, there must be a motivation to make the combination and a reasonable expectation that such a combination would be successful, otherwise a skilled artisan would not arrive at the claimed combination.” In re Stepan, 868 F.3d 1342, 1346 n.1 (Fed. Cir. 2017). Petitioner’s new argument relies on a person of ordinary skill in the art modifying the Figure 5 embodiment of Mishra to connect the field plate to the source rather than the gate. Reply 21–24. Petitioner does not, however, show that a person of ordinary skill in the art would have had a motivation to make this modification or a reasonable expectation that this combination would be successful. Id. Petitioner argues instead that “[n]o ‘reason’ is needed.” Id. at 24. Thus, Petitioner does not show by a preponderance of the evidence that claim 1 would have been obvious over the combination of Mishra and Ren.” slip op. at 19

    Patent outcomesUS 8,264,003 not shown unpatentable
    Claim construction§ 103 obviousnesscites Phillips · KSR · Graham
    Patents in suitUS 8,264,003
  • PTAB · Jun 9, 2026 · IPR2025-00321 · APJ Christopher M Kaiser · IPR · Final written decision

    The Board held claims 1, 2, 5–7, 9, 16, and 17 not unpatentable because the asserted combinations did not establish the required purge-tower teachings or prior-art status.

    RulingsFinal written decision
    • Skill levelSkill level petitioner adoptedDecided for petitioner

      “Petitioner contends that one of ordinary skill in the art “would have had (1) at least a bachelor’s degree in Mechanical Engineering, Computer Engineering, Chemical Engineering, Materials Science, or a related field, and (2) at least two years of research or industry experience in 3D printing or materials used for 3D printing.” Pet. 5 (citing Ex. 1003 ¶¶ 14–16). Petitioner also argues that “[a]dditional experience could substitute for a formal degree or formal training (and vice versa).” Id. Patent Owner proposes a slightly different level of skill, arguing that a person of ordinary skill in the art “would have had a bachelor’s degree in Mechanical Engineering, Computer Engineering, Chemical Engineering, Materials Science, or a comparable field and at least two years of experience related to 3D printing, with additional experience potentially being a substitute for a formal degree or training (and vice versa).” Prelim. Resp. 24. Neither party explains why the outcome of this case would be affected by the adoption of any of the proffered definitions of a person of ordinary skill in the art. We adopt Petitioner’s assessment of the level of ordinary skill in the art, as it appears consistent with the ’324 patent and the asserted prior art. See Okajima v. Bourdeau, 261 F.3d 1350, 1355 (Fed. Cir. 2001).” slip op. at 8

    • Claim Construction › Intrinsic evidence (Phillips canons) › Plain and ordinary meaning to a POSITATerm construed board ownOther

      “According to the ’713 patent, “[p]urge tower 24 itself may be . . . recycled or otherwise discarded as desired.” Ex. 1001, 8:27–28. This description provides some support for Patent Owner’s view, because a purge tower too intimately integrated with the part would be difficult or impossible to recycle or discard. This is further supported by the ’713 patent’s statement that “purge tower 24 may be printed at any suitable location on build substrate 44 (i.e., at any location in the x-y build plane not occupied by 3D part 20 or support structure 22).” Id. at 8:30–34. It also is supported by Dr. Hickner’s testimony that the ’713 patent “clearly shows . . . the 24 purge tower separated from the part” and that “the purge tower is a separate physical object.” Ex. 2016, 28:8–10, 64:1–9. On the other hand, there is evidence supporting Petitioner’s view that, as long as the purge tower is generally separate from the part and the support structure, it may still make contact with those portions of the print. As noted above, “purge tower 24 may be printed at any suitable location on build substrate 44 (i.e., at any location in the x-y build plane not occupied by 3D part 20 or support structure 22).” Ex. 1001, 8:30–34. This language does not exclude locations adjacent to or in contact with the part or the support structure. Thus, determine that a “purge tower,” as that term is used in the context of the ’713 patent, may not be an integrated portion of a printed part or support structure but need not be free of all contact with the printed part or support structure.” slip op. at 9

    • BurdenNot shown unpatentable

      “There is evidence of record to support both Petitioner’s view and Patent Owner’s view. On the record developed at trial, however, we cannot say that the preponderance of the evidence favors Petitioner, who bears the burden of proof. See 35 U.S.C. § 316(e). Accordingly, Petitioner has not shown by a preponderance of the evidence that KISSlicer teaches printing a layer of a purge tower each time the printer switches one extruder to the operating mode. Because proving the obviousness of claims 1 and 16 requires such a showing, Petitioner has not shown by a preponderance of the evidence that claims 1 and 16 would have been obvious over the combination of Priedeman and KISSlicer. 5. Analysis of Remaining Claims Claims 2, 6, 7, 9, and 17 all depend, directly or indirectly, from claim 1 or claim 16. Accordingly, they all include the limitations of either claim 1 or claim 16. Because, as discussed above, Petitioner has not shown that the combination of Priedeman and KISSlicer teaches or suggests all the limitations of claims 1 and 16, Petitioner also has not proven by a preponderance of the evidence that claims 2, 6, 7, 9, and 17 would have been obvious over that combination of references.” slip op. at 21

    • Obviousness (§103) › Analogous artAnalogous artOther

      “On the record developed at trial, we agree with Petitioner. According to several industry forum posts, people interested in three-dimensional printing located the website where KISSlicer was posted between February 2012 and April 2012. Ex. 1028, 1 (post discussing and directing others to KISSlicer on April 11, 2012); Ex. 1031, 1 (two posts discussing KISSlicer on March 16, 2012, and March 21, 2012); Ex. 1032, 1 (two posts discussing KISSlicer on February 11, 2012, and February 14, 2012). Thus, not only was it possible for people of ordinary skill in the art to locate KISSlicer; people of ordinary skill in the art actually did locate it. Accordingly, Petitioner has shown by a preponderance of the evidence that KISSlicer was publicly accessible.” slip op. at 19

    Patent outcomesUS 9,421,713 not shown unpatentable
    Claim construction§ 102 anticipation§ 103 obviousnesscites Phillips · KSR · Graham
    Patents in suitUS 9,421,713
  • PTAB · Jun 9, 2026 · IPR2025-00118 · APJ Jo-Anne M Kokoski · IPR · Final written decision

    Claims 1–14 were not shown unpatentable because the Petition did not establish the claimed adjacent pad groups, common ESD bus, or pad-to-pad bonding wires.

    RulingsFinal written decision
    • Skill levelSkill level petitioner adoptedOther

      “would have had a bachelor of science degree in electrical engineering or similar discipline, and 2–3 years of professional experience working with (e.g., researching, analyzing, designing, or teaching) ICs, or equivalent level of skill, knowledge, and experience (e.g., an advanced degree may replace some of the professional experience and vice versa). This POSITA would have been aware of and generally knowledgeable about IC design, layout, manufacturing, packaging, and ESD protection. Pet. 18 (citing Ex. 1003 ¶¶ 29–33). Patent Owner states that it “does not dispute Petitioner’s proposed level of a” POSITA “for purposes of this IPR.” PO Resp. 10. In the Institution Decision, we adopted the assessment offered by Petitioner. Dec. 7. Because Petitioner’s definition of the level of skill in the art is consistent with the ’164 patent and the asserted prior art, we maintain it for purposes of this Final Written Decision. See Okajima v. Bourdeau, 261 F.3d 1350, 1355 (Fed. Cir. 2001).” slip op. at 7

    • Claim Construction › Threshold & procedure › Whether a term needs construction (O2 Micro)No construction neededOther

      “customary meaning of such claim as understood by one of ordinary skill in the art and the prosecution history pertaining to the patent.” 37 C.F.R. § 42.100(b). Under this standard, claim terms are generally given their plain and ordinary meaning as would have been understood by a person of ordinary skill in the art at the time of the invention and in the context of the entire patent disclosure. Phillips v. AWH Corp., 415 F.3d 1303, 1313 (Fed. Cir. 2005) (en banc). Only those terms in controversy need to be construed, and only to the extent necessary to resolve the controversy. Realtime Data, LLC v. Iancu, 912 F.3d 1368, 1375 (Fed. Cir. 2019). Based on our review of the complete trial record and the arguments raised by the parties, we determine that it is not necessary to expressly construe any claim terms to resolve the parties’ dispute. Realtime Data, 912 F.3d at 1375.” slip op. at 7

    • Expert testimonyPatent owner expert creditedDecided for patent owner

      “includes segmented ground rails 350, 355. . . . The package substrate 310 includes a package common ground rail 360, and the segmented SoC ground rails 350, 355 are independently connected to the package common ground rail 360 via separate connections 370, 375 respectively.”). As set forth above, Dr. Foty describes the three ground lines in Saint Figure 7-7 as “segmented rails” when discussing the combination of Saint and Haralabidis, thus equating the three ground lines in Saint Figure 7-7 with Haralabidis’ segmented ground rail. Ex. 1003 ¶ 368. Neither Petitioner nor Dr. Foty, however, adequately addresses how or why a POSITA would have understood that the three separate grounds lines in Saint Figure 7-7 were “segmented rails” like the segments of the single ground line described in Haralabidis. In contrast, Dr. Khatri credibly testifies: Haralabidis teaches the use of a “common ground rail” to connect “segmented ground rails.” Haralabidis, 3:9–22, 3:34– 40, 3:65–4:12. A POSITA would understand “segmented ground rails” to refer to a single ground signal that has been “segmented.” That is fundamentally different from the design of Saint’s Figure 7-7 that Dr. Foty relies on, which uses three different ground signals, GND1, GND2, and GND3—not a single ground signal that has been “segmented.” Because of that, a POSITA would not have been motivated to change the Figure 7-7 design completely to connect three separate signals (GND1, GND2, and GND3) together as Dr. Foty proposes. Ex. 1003 ¶ 368. Indeed, for these reasons, a POSITA would have understood Haralabidis’ teachings of a “common ground rail” are inapplicable to Saint’s Figure 7-7. Ex. 2010 ¶ 129. Petitioner’s arguments and Dr. Foty’s testimony with respect to the modification of Saint Figure 7-7 leave an analytical gap that does not apprise us of why a POSITA would have modified Saint Figure 7-7 to include a common ESD bus as described in Haralabidis.” slip op. at 37

    • Obviousness (§103) › Motivation to combine / reasonable expectation of successMotivation not foundNot shown unpatentableNot shown unpatentable

      “For these reasons, we find that Yoshinaga’s statement that “[r]eference potential pads are not shown to simplify the drawing” indicates that reference potential pads are not depicted in Yoshinaga Figure 6, and determine that Yoshinaga Figure 6 does not disclose “a plurality of pad groups, adjacent and connected to the plurality of ESD buses” as recited in claim 6. Petitioner also argues that a POSITA would have understood that power supply pads 3, 4, and 58 in Yoshinaga “could just as readily be used as reference pads” and it would have been obvious “to use the pads immediately next to the saved areas as reference pads (e.g., pads 5 and 6) as pad assignments were left to the designer’s discretion.” Pet. 31 (citing Ex. 1003 ¶¶ 137–139). Petitioner asserts that “selecting which pads to use for ground, power signals, etc. is a design choice that depends on factors like chip size, the number of I/O signals, and the number of pads available.” Pet. 31 (citing Ex. 1003 ¶ 137–139). Petitioner states that such discretion would be to preserve Yoshinaga’s saved area for other circuitry as taught by Saint. Pet. 31–32 (citing Ex. 1003 ¶¶ 137–139; Pet. 19–23 (§ IX.A)). Neither Petitioner nor Dr. Foty adequately explain, however, why a POSITA would have made this specific design choice, namely, replacing power supply pads 3, 4, and 58 with reference pads. Pet. 31; Ex. 1003 ¶¶ 137–139; see also Polaris Indus., Inc. v. Arctic Cat, Inc., 882 F.3d 1056, 1069 n.4 (Fed. Cir. 2018) (“Merely stating that a particular placement of an element is a design choice does not make it obvious.” (quoting Cutsforth, Inc. v. MotivePower, Inc., 636 Fed. Appx. 575, 578 (Fed. Cir. 2016))). Petitioner offers the general proposition that pad assignments are left to the designer’s discretion, but this does not provide a reason why a POSITA would have been motivated to modify Yoshinaga Figure 6 as proposed. Pet. 31; Ex. 1003 ¶¶ 137–139. We have determined that Yoshinaga does not show (rather than does not label) reference pads. Because all of Yoshinaga’s illustrated pads are power supply pads, Petitioner’s proposed reassignment of pads would not be a simple matter of rearrangement of an existing mixture of power supply and reference pads, but require that reference pads be imported from elsewhere, and power supply pads be moved to some unspecified location. Petitioner’s arguments and Dr. Foty’s testimony with respect to the modification of Yoshinaga Figure 6 leave an analytical gap that does not apprise us of why a POSITA would have modified Yoshinaga Figure 6 to include reference pads in the place of power supply pads 3, 4, and 58. We agree with Patent Owner that none of Petitioner’s rationales” slip op. at 20

    Patent outcomesUS 10,879,164 not shown unpatentable
    Claim construction§ 103 obviousnesscites Phillips
    Patents in suitUS 10,879,164
  • PTAB · Jan 5, 2026 · IPR2024-00911 · APJ Kimberly Mcgraw · IPR · Final written decision

    Claim 10 was not shown unpatentable under § 103 over Toyama because the challenge did not remedy the deficiencies in its nonobvious base claim 8.

    RulingsFinal written decision
    • Skill levelSkill level petitioner adoptedOther

      “Petitioner’s proposed definition appears to be consistent with the cited prior art and the disclosure of the ’806 patent, and we adopt it for purposes definition of a POSITA.” slip op. at 8

    • Claim Construction › Threshold & procedure › Whether a term needs construction (O2 Micro)No construction neededOther

      “In our Decision on Institution, we noted that the parties disputed construction of “each local contact” found in dependent claim 10, and “dielectric structure” recited in independent claim 8. Inst. Dec. 8–9. We determine that no express construction of “each local contact” recited in claim 10, or any other claim term, is required to resolve the issues in dispute in this proceeding.” slip op. at 9

    • Obviousness (§103) › Graham factors (scope of art, differences, level of skill)Not shown unpatentableNot shown unpatentable

      “independent claim 8 would have been obvious for the reasons set forth in its petition in the 791-IPR. See id. at 1 (stating the present Petition maintains the same grounds set forth in IPR2024-00791). As explained in our Final Written Decision (Ex. 3001) in the 791-IPR issued concurrently, Petitioner did not show by a preponderance of the evidence that independent claim 8 would have been obvious over Toyama under any of Petitioner’s three alternative arguments. None of Petitioner’s arguments set forth in the present Petition, including the arguments directed to claim 10, remedy the deficiencies regarding its base claim 8. See Pet. 53–31, 98–101, 124–125; see also Reply. Accordingly, for the same reasons set forth in the Final Written Decision in the 791-IPR issued concurrently, Petitioner has not shown by a preponderance of the evidence that independent claim 8, and therefore dependent claim 10, would have been obvious over Toyama. See In re Fine, 837 F.2d 1071, 1076 (Fed. Cir. 1988) (“Dependent claims are nonobvious under section 103 if the independent claims from which they depend are nonobvious.”); Ex. 3001.” slip op. at 14

    • Expert testimonyNot reached

      “Petitioner relies on the Declaration of Jack C. Lee, Ph. D. (Ex. 1003) and the Reply Declaration of Jack C. Lee, Ph.D. (Ex. 1043) in support of its 2 The Leahy-Smith America Invents Act (“AIA”), Pub. L. No. 112–29, 125 Stat. 284 (2011), revised 35 U.S.C. §§ 102 and 103 effective March 16, 2013. Because the ’806 patent has an effective filing date after March 16, 2013 (Ex. 1001, codes (22), (63)), we refer to the AIA version of Sections 102 and 103. 3 Toyama, US Pub. No. 2017/0179026 A1, published June 22, 2017 (Ex. 1005). 4 Petitioner characterizes its alternative arguments of unpatentability of claim 10 as based on three “grounds.” See Pet. 15. Because each of Petitioner’s arguments are based on the same reference, albeit different embodiments, we characterize Petitioner’s challenges as three alternative arguments based on a single ground because each argument relies on the same reference. Ph.D. (Ex. 2005). Transcripts of the depositions of Dr. Lee (Exs. 2006, 2010) and of Dr. Yang (Ex. 1044) have also been submitted into the record.” slip op. at 7

    Patent outcomesUS 10,937,806 not shown unpatentable
    Claim construction§ 103 obviousnesscites Phillips
    Patents in suitUS 10,937,806
  • PTAB · Jan 5, 2026 · IPR2024-00791 · APJ Kimberly Mcgraw · IPR · Final written decision

    Claims 8, 9, 11, and 12 were not shown unpatentable under §103 over Toyama because the asserted structures did not meet the construed TAC limitation and the proposed modifications lacked adequate motivation.

    RulingsFinal written decision
    • Skill levelSkill level petitioner adoptedDecided for petitioner

      “(“POSITA”) would have had “a bachelor of science degree in electrical engineering or a similar discipline” with “2–3 years of professional experience working with (e.g., researching, designing, or teaching) NAND flash memory devices, or an equivalent level of skill, knowledge, and experience (e.g., an advanced degree may replace some of the professional experience).” Pet. 27 (citing Ex. 1003 ¶¶ 34–38). Petitioner further contends that a “POSITA would also have been aware of and generally knowledgeable about semiconductor manufacturing and 3D NAND’s structure, its component parts, how it operates, and how it is controlled.” Id. Patent Owner does not object to Petitioner’s proposed definition (PO Resp. 12), but Patent Owner’s declarant Dr. Yang provides a slightly different definition, stating a POSITA: would have had at least a bachelor’s degree in electrical engineering, materials science, or a similar discipline, along with at least 2 years of professional experience in semiconductor fabrication process integration for memory devices or an equivalent level of knowledge and experience. For example, an experience, or extensive experience may replace some of the educational requirements. Ex. 2004 ¶ 43. Petitioner’s proposed definition appears to be consistent with the cited prior art and the disclosure of the ’806 patent, and we adopt it for purposes of this Decision. We note that our Decision would be the same under either definition of a POSITA.” slip op. at 8

    • Claim Construction › Intrinsic evidence (Phillips canons) › Plain and ordinary meaning to a POSITAPlain and ordinary meaningDecided for patent owner

      “(TACs) extending vertically through the dielectric structure” recited in claim element [8.G] encompasses multiple TACs, each extending through a separate, different dielectric structure, while Patent Owner argues that the phrase requires that the plurality of TACs (i.e., at least two TACs) must extend through the same dielectric structure. See, e.g., Pet. 49–50; PO Resp. 18–21; Reply 2–4. In our Decision on Institution, we preliminarily construed this phrase to require that more than one (i.e., a plurality) TAC in the TAC region extends vertically through a single dielectric structure. See Inst. Dec. 17. Based upon a full record, we construe this term of claim element [8.G.iii] (i.e., “ . . . a through array contact (TAC) region formed between the first and second channel regions, wherein the TAC region comprises a plurality of through array contacts (TACs) extending vertically through the dielectric structure”) according to its plain language to require that a plurality (i.e., more than one) of TACs must extend vertically through a (i.e., at least one) dielectric structure. Under this construction, the plurality of TACs may extend through more than one dielectric structure, but the plurality of TACs must extend through at least one dielectric structure. The plain language of the claim is not satisfied if each TAC extends through a separate dielectric structure because, in this scenario, there is not a plurality of TACs that extend through a dielectric structure.” slip op. at 10

    • Obviousness (§103) › Motivation to combine / reasonable expectation of successMotivation not foundNot shown unpatentableNot shown unpatentable

      “Resp. 31–33. Patent Owner persuasively explains, with supporting testimony by Dr. Yang, that these regions containing the interconnects and peripheral circuitry would prevent repeating the layout in the hd1 direction because the interconnects and peripheral circuitry would be located in the same region that Petitioner proposes adding the additional memory plane. Id. (citing Ex. 2004 ¶ 72). Patent Owner further persuasively explains that Toyama teaches repeating the layout in the hd2 direction, not the hd1 direction, because of the location of its interconnects and peripheral circuitry, which prevents repeating the structure in the hd1 direction. See id. at 34 (citing Ex. 1005, Figures 17E, 17F). Patent Owner persuasively explains that Toyama Figure 17F (which is an alternate view of the structure shown in Figure 17E) shows that the memory array has interconnects and driver circuits on at least the left side, which means that in a modification adding additional planes, each plane would necessarily include these interconnects and driver circuitry on the left side. Id. at 35 (citing Ex. 2004 ¶ 75). We agree with Patent Owner that Petitioner has not sufficiently shown that it would have been obvious for a POSITA to repeat the structure shown in Figure 17E in the hd1 direction due to the presence of its interconnects and peripheral circuitry.” slip op. at 34

    Patent outcomesUS 10,937,806 not shown unpatentable
    Claim construction§ 103 obviousnesscites Phillips · KSR · Graham
    Patents in suitUS 10,937,806
  • PTAB · Nov 5, 2025 · IPR2024-00792 · APJ Jo-Anne M Kokoski · IPR · Final written decision

    Claims 1–6 were not shown unpatentable because the asserted references did not establish the claimed bias voltages and pre-verify stage.

    RulingsFinal written decision
    • Skill levelSkill level petitioner adoptedOther

      “In the Institution Decision, we adopted the assessment offered by Petitioner. Dec. 5–6. Because Petitioner’s definition of the level of skill in the art is consistent with the ’957 patent and the asserted prior art, we maintain it for purposes of this Final Written Decision. See Okajima v. Bourdeau, 261 F.3d 1350, 1355 (Fed. Cir. 2001).” slip op. at 6

    • Expert testimonyPatent owner expert creditedOther

      “It is within our discretion to assign the appropriate weight to Dr. Przybylski’s testimony. See, e.g., Yorkey v. Diab, 601 F.3d 1279, 1284 (Fed. Cir. 2010) (holding that the Board has discretion to give more weight to one item of evidence over another “unless no reasonable trier of fact could have done so”); In re Am. Acad. of Sci. Tech Ctr., 367 F.3d 1359, 1368 (Fed. Cir. 2004) (“[T]he Board is entitled to weigh the declaration and conclude that the lack of factual corroboration warrants discounting the opinions expressed in the declarations.”). On this record, we decline to generally discount Dr. Przybylski’s based on Petitioner’s contentions. When assigning upon which the testimony is based. See PTAB Consolidated Trial Practice Guide 40–41 (Nov. 2019). In our analysis of the asserted grounds of unpatentability, we weigh Dr. Przybylski’s testimony accordingly.” slip op. at 6

    • Claim Construction › Threshold & procedure › Whether a term needs construction (O2 Micro)No construction neededOther

      “customary meaning of such claim as understood by one of ordinary skill in the art and the prosecution history pertaining to the patent.” 37 C.F.R. § 42.100(b). Under this standard, claim terms are generally given their plain and ordinary meaning as would have been understood by a person of ordinary skill in the art at the time of the invention and in the context of the entire patent disclosure. Phillips v. AWH Corp., 415 F.3d 1303, 1313 (Fed. Cir. 2005) (en banc). Only those terms in controversy need to be construed, and only to the extent necessary to resolve the controversy. Realtime Data, LLC v. Iancu, 912 F.3d 1368, 1375 (Fed. Cir. 2019). Based on our review of the complete trial record and the arguments raised by the parties, we determine that it is not necessary to expressly construe any claim terms to resolve the parties’ dispute. Realtime Data, 912 F.3d at 1375.” slip op. at 7

    • Obviousness (§103) › Graham factors (scope of art, differences, level of skill)Not shown unpatentableNot shown unpatentable

      “claim 1 would have been obvious over the combined teachings of Hongtao and Yu by a preponderance of the evidence. 35 U.S.C. § 316(e) (2018); see also Harmonic Inc. v. Avid Tech., Inc., 815 F.3d 1356, 1363 (Fed. Cir. 2016) (citing 35 U.S.C. § 312(a)(3) (requiring inter partes review petitions to identify “with particularity . . . the evidence that supports the grounds for the challenge to each claim”)). After considering the parties’ arguments and evidence of record, and weighing the testimony of Dr. Liu and Dr. Przybylski, we are not persuaded that Petitioner meets its burden of establishing, by a preponderance of the evidence, that Hongtao teaches or suggests applying a second bias voltage that is smaller than the first bias voltage in the verify stage as recited in limitation [1.d]. Hongtao is silent with respect to the magnitudes of the pre-conduction and conduction voltages. Hongtao teaches that “a pre-conduction voltage is applied to both the unselected word line and the selected word line to turn on the channels of the selected string and the unselected string.” Ex. 1005 ¶ 23. Hongtao then teaches that, in the reading phase, “[t]he gates of the unselected memory cells on the selected string are applied with a conduction voltage through the unselected word lines.” Id. ¶ 25. Hongtao, however, describes the magnitudes of the pre-conduction and conduction relative to each other. See id. ¶¶ 21–26. Petitioner and Dr. Liu point to Hongtao’s statement that “the greater the conduction voltage, the greater the read disturbance” to support its contention that the conduction voltage is smaller than the pre-conduction voltage, but that statement refers to the relationship between conduction voltage and the read interference it causes and does not compare the conduction voltage to the pre-conduction voltage. See Pet. 40 (citing Ex. 1005 ¶ 26); Ex. 1003 ¶ 120 (citing Ex. 1005 ¶ 26). We also find credible Dr. Przybylski’s testimony that Hongtao lacks the details needed to determine how the gate voltages develop over time, in particular the length of the pre-conduction period. See Ex. 2003 ¶ 96. Dr. Przybylski’s testimony is consistent with the ’957 patent’s teaching that when the pre-pulse time is long enough that the bias voltages are fully developed before the TSG transistor is switched off at the unselected memory cell string, hot carrier injection “may not be generated from the selected memory cell to the upper adjacent memory cell of the selected memory cell in the selected memory cell.” Ex. 1001, 11:60–12:1. In contrast, when the pre-pulse time is insufficient for the bias voltages to fully develop, hot carrier injection may be generated. Id. at 12:1–9. And we are not persuaded that Petitioner and Dr. Liu sufficiently rebut Dr. Przybylski’s persuasive testimony that casts doubt on Petitioner’s contention that Hongtao teaches a second bias voltage that is smaller than a first bias voltage as recited in limitation [1.d]. For example, Dr. Liu’s testimony that Hongtao teaches applying voltages on gate terminals does not adequately address Patent Owner’s argument and Dr. Przybylski’s testimony that Hongtao depicts target values for the word line voltages instead of the See Ex. 1027 ¶¶ 16–40. Neither Petitioner nor Dr. Liu adequately establish that Hongtao’s applied voltages are sufficiently developed such that the preconduction voltage actually is bigger than the conduction voltage. Petitioner’s argument that Hongtao teaches or discloses a second bias voltage that is smaller than the first bias voltage hinges on a POSITA’s interpretation of Hongtao’s Figure 2. In light of Hongtao’s dearth of details regarding the absolute or relative magnitudes of the pre-conduction and conduction voltages, and Dr. Przybylski’s unrebutted testimony that Hongtao does not provide sufficient information to ascertain the actual bias voltages that will be applied on the gate terminals of the memory cells over time, we are not persuaded that Petitioner carries its burden of establishing that Hongtao discloses limitation [1.d]. For these reasons, we determine that Petitioner does not establish by a preponderance of the evidence, that independent claim 1, and claims 2–6 that depend, directly or indirectly, therefrom, would have been obvious over the combined teachings of Hongtao and Yu.” slip op. at 15

    Patent outcomesUS 11,468,957 not shown unpatentable
    Claim construction§ 102 anticipation§ 103 obviousnesscites Phillips
    Patents in suitUS 11,468,957
  • PTAB · Oct 22, 2025 · IPR2024-00794 · APJ Michael T Cygan · IPR · Final written decision

    Claims 1 and 6 are unpatentable over Park; claims 2–5 and 7–11 were not shown unpatentable on the asserted grounds.

    RulingsFinal written decision
    • Skill levelSkill level petitioner adoptedDecided for petitioner

      “B. Level of Ordinary Skill in the Art Petitioner asserts that a person of ordinary skill in the art (“POSITA”) at the critical time “would have had a bachelor’s degree in electrical engineering or a similar discipline, along with 2-3 years of professional experience working with (e.g., researching, designing, or teaching) NAND flash memory devices, or an equivalent level of skill, knowledge, and experience (e.g., an advanced degree may replace some of the professional experience).” Pet. 19 (citing Ex. 1003 ¶¶ 36–37). Petitioner further asserts that a POSITA “would have been aware of and generally knowledgeable about 3D NAND’s structure, its component parts, how it operates, and how it is controlled.” Id. Patent Owner does not object to this assessment, arguing that its claims are valid regardless of the precise definition. PO 3 Neither party presents evidence or arguments regarding objective evidence of non-obviousness. skill, as it appears to be consistent with the specification of the ’623 patent and the prior art of record.” slip op. at 5

    • Expert testimonyPetitioner expert discountedMixed

      “the Petition, Petitioner’s approach to Shibata’s drive circuit and Park’s dummy channel/open region teachings results in a deficiency in its showing of reasonable expectation of success for its expressed combination of extending Park’s insulative trenches to replace some of its common source lines. Petitioner relies solely on the fact that the references are capable of performing the relied-upon functions or could possess the relied-upon structure. See, e.g., Pet. Reply 19–20 (stating, “If Shibata accommodates this type of trench . . . there is no reason Park cannot as well,” and “Park itself already presents a variety of ways to minimize any etching problem that may be encountered when using wet etching”). But Park does not describe its dummy channel or open region teachings as generally applicable to all of its embodiments. And Petitioner needs to show a reason why the application of Shibata would be reasonably expected to have been successfully applied in Park, not merely state that there is “no reason” to expect that it would not be successful. See DSS Tech. Mgmt., Inc. v. Apple Inc., 885 F.3d 1367, 1377 (Fed. Cir. 2018) (finding that even where two structures have “the same physical structure,” applying the teachings of one structure to the other requires “additional, reasoned analysis.”). The knowledge of one skilled in the art cannot bridge this gap, because these are inventive features of Park and Shibata. Furthermore, Petitioner also has not sufficiently explained, for any of its proposed augmentations, how metal gate deposition would occur sufficiently in the most remote regions of the long, parallel insulating layers in Petitioner’s Park-Shibata combination of such regions to avoid the risk of incomplete gate electrode layers in the final memory device that Patent Owner argues would result in a significant trade-off in memory device accuracy, and device scalability. PO Resp. 68 (citing Ex. 2010 ¶ 145). For example, Dr. Lee addresses only etching issues, not deposition issues. Ex. 1025, ¶¶ 32–47.” slip op. at 46

    • Claim Construction › Intrinsic evidence (Phillips canons) › Plain and ordinary meaning to a POSITATerm construed petitioner constructionDecided for petitioner

      “We agree with Petitioner. As pointed out by Patent Owner, the “trenches formed in the BSG” language of claim 1 reflects specific description of the gate-first method of manufacturing, but not the gate-last method of manufacturing. Ex. 1001, 7:17–19 (“referring to Fig. 1A, one or more first dielectric trenches . . . are formed in the one or more BSGs”). However, as Petitioner points out, the claims are to a memory “device,” not to a method of manufacturing or a device produced by specific manufacturing steps. Pet. Reply 1. During prosecution of the application that matured into the ’623 patent, the Examiner determined that the device of claim 1 was distinct from a separately claimed method of manufacturing and The Examiner’s requirement stated that the memory device of claim 1 is not limited by the disclosed process of manufacture because “the process claims require . . . deposition steps of polysilicon whereas the product claims do not require any polysilicon.” Id. Applicant agreed “without traverse” with the Examiner’s determination and selected to pursue only the “device” claims. Id. at 596 (“Applicant elects, without traverse, Invention I, Claims 1–11, drawn to a device”).4 The distinctiveness is also supported by the discussion in the ’623 patent of “formed in the BSG” that describes its device separately from its method of formation. The ’623 patent describes that “[i]n the disclosed memory device, one or more first dielectric trenches are formed in the BSG and extend in a length direction of the substrate to separate the BSG into a plurality of sub-BSGs.” Ex. 1001, 2:25–28. This description precedes, and is separate from, its description of an aspect of a process for manufacturing a memory device in which the BSG layer is formed and then “dielectric trenches are formed” that may “pass through the BSG layer” so that the “BSG layer is separated by the one or more first dielectric trenches into a plurality of sub-BSG layers.” Id. at 3:30–45. The description of the device having trenches formed in the BSG, which is not limited to a particular manufacturing process, further supports Petitioner’s contention that the “formed in the BSG” language is not limited to a particular manufacturing embodiment.” slip op. at 7

    • Claim Construction › Intrinsic evidence (Phillips canons) › Specification disavowal / 'present invention' languageTerm construed board ownDecided for patent owner

      “We do not agree that such arguments support Patent Owner’s conclusion. Patent Owner acknowledges that two portions of a BSG that are connected at a small opening are not separated because both portions remain electrically connected to each other. Id. at 17 (stating, “common source regions 52a is merely in the middle of a single sub-BSG 2 (‘SUB-BLK2’) and does not divide it into further sub-BSGs because there is an H-cut 72 that connects the two sides of the common source region such that both regions are part of the same sub-BSG”) (citing Ex. 1001, 9:15–19, 9:41–44) (emphasis omitted); Ex. 1026, 34:4–15, 41:23–42:16 (Dr. Kuhn attesting that common source regions may isolate adjacent BSGs). Patent Owner considers other portions of the BSG to be separated into sub-BSGs because there is no such connection between the sub-BSG portions. Id. at 17–18 (annotating Ex. 1001, Fig. 1B). Under such reasoning, the addition of a trench closing a gap between two neighboring BSG portions, thereby breaking the electrical connection therebetween, would “separate” the two BSG portions into further sub-BSGs. In its obviousness assertions, Petitioner argues for such an interpretation of the claim. See Pet. Reply 10 (“Park’s layers 111 electrically separate its BSG”). Based on the above, we determine that the phrase “dielectric trenches formed in the BSG and extending in a length direction of the substrate to perform electrical separation between sub-BSGs, but does not require that the trenches act alone, extending from one end of the device to the other across the entire BSG. Similarly, the trenches need not have any particular length, and need only to have some length that performs that separation.” slip op. at 13

    Patent outcomesUS 10,950,623 mixed
    Claim construction§ 103 obviousnesscites Phillips · KSR · Graham
    Patents in suitUS 10,950,623
Page 1 of 17
← Previous12345…Next →

Holdings, summaries, rulings, issues, outcomes, winners and claim constructions shown for a decision were generated by a large language model reading the opinion. They are a guide to the decision, not the decision. Confirm every one against the court's own text before relying on it. Outcomes read from the patent owner’s side. Party names are extracted from the decision and are missing on about 900 short Director denials and scans, which carry the trial number instead.