- Sandisk Corp. v. Netlist, Inc.Some claims unpatentablePTAB · Sep 28, 2016 · IPR2015-01020 · APJ Peter P Chen · IPR · Final written decision
Claims 17, 22, 24, 26, and 33 are unpatentable as obvious over Takeda, JEDEC, and Connolly; claims 15, 16, 31, and 32 were not shown unpatentable over Takeda and JEDEC.
RulingsFinal written decision- Claim Construction › Intrinsic evidence (Phillips canons) › Plain and ordinary meaning to a POSITATerm construed petitioner constructionDecided for petitioner
“We are unpersuaded by Patent Owner’s position. First, the claim language does not recite any physical or structural connection, rather, only “electrically coupling.” Pet. Reply 3, 8–9. In addition, the specification of the ’150 patent does not define explicitly the term “selectively electrically coupling.” Therefore, as in IPR2014-00882 and IPR2014-01011, we refer to its ordinary and customary meaning, as would be understood by one of ordinary skill in the art in the context of the entire disclosure. Translogic Tech., 504 F.3d at 1257. A technical dictionary, the IEEE Dictionary,4 defines “electrical coupling” as “[e]lectrical charges in conductors of a disturbed circuit formed by electrical induction.” Ex. 3001. The IEEE Dictionary explains that “[s]ince the ratio of a conductor’s electrostatic charge to the potential difference between conductors (required to maintain that charge) is the general definition of capacitance, electrical coupling is also called capacitive coupling.” Id. The IEEE Dictionary defines” slip op. at 9
- Skill levelSkill level board ownOther
“Based on our review of the ’150 patent and the types of problems and solutions described in the ’150 patent and cited prior art, we conclude a person of ordinary skill in the art at the time of the ’150 patent would have a Bachelor’s degree in electrical engineering, computer engineering, computer science, or related field, and at least one year of work experience, including familiarity with computer memory systems and related industry standards such as JEDEC standards for DRAM memories and memory modules. We further note that the applied prior art reflects the appropriate level of skill at the time of the claimed invention. See Okajima v. Bourdeau, 261 F.3d 1350, 1355 (Fed. Cir. 2001). D. Declarant Testimony” slip op. at 13
- Expert testimonyPetitioner expert creditedDecided for petitioner
“To testify as an expert under Federal Rule of Evidence 702, a person need not be a person of ordinary skill in the art, but rather must be “qualified in the pertinent art.” Sundance, Inc. v. DeMonte Fabricating Ltd., 550 F.3d 1356, 1363–64 (Fed. Cir. 2008); see SEB S.A. v. Montgomery Ward & Co., 594 F.3d 1360, 1372–73 (Fed. Cir. 2010) (upholding a district court’s ruling to allow an expert to provide testimony at trial because the expert “had sufficient relevant technical expertise” and the expert’s “knowledge, skill, experience, training [and] education . . . [wa]s likely to assist the trier of fact to understand the evidence”); Mytee Prods., Inc. v. Harris Research, Inc., 439 F. App’x 882, 886–87 (Fed. Cir. 2011) (non-precedential) (upholding admission of the testimony of an expert who “had experience relevant to the field of the invention,” despite admission that he was not a person of ordinary skill in the art). As noted above, Dr. Jagannathan has designed and implemented hardware virtual memory caches, and researched theoretical performance measures of various cache coherency protocols, and has experience in the design of memory systems. We find that, although Dr. Jagannathan may be less experienced than Dr. Sechen in the area of memory module design, he is nonetheless qualified sufficiently to testify about memory systems and memory modules. E. Asserted Obviousness of Claims 15, 16, 31, and 32 in view of Takeda” slip op. at 14
- ExcludeMotion to exclude, deniedDenied
“We have reviewed the parties’ contentions on this issue, and exercise our discretion to determine that Petitioner’s Reply and the Jagannathan Supplemental Declaration will not be excluded. We find that, although they may be “inartfully” drafted, the first Jagannathan declaration and Petition sufficiently outlined Petitioner’s position on the function of the chip select signal, namely, that the chip select signal was not itself the logic signal enabling operation of bit-switches. We further find that Petitioner’s Reply and the Supplemental Jagannathan Declaration did not present an entirely new rationale of unpatentability based on Takeda, JEDEC, and Connolly. Cf. Intelligent Bio-Sys., Inc. v. Illumina Cambridge Ltd., 821 F.3d 1359, 1369–70 (Fed. Cir. 2016) (affirming Board’s exclusion of reply brief and declaration that changed unpatentability theory to “an entirely new rationale”). Moreover, there is no dispute that Patent Owner was aware of Petitioner’s position by no later than the Jagannathan deposition, which preceded Patent Owner’s Response by ten days. Patent Owner could have addressed Petitioner’s chip select signal contention, procedurally or substantively, in its Response, but chose to raise the issue only after Petitioner filed its Reply and Supplemental Jagannathan Declaration. Accordingly, Patent Owner had notice of Petitioner’s position and an opportunity to refute that position in its Response.” slip op. at 24
Patent outcomesUS 7,881,150 mixedClaim construction§ 103 obviousnesscites KSR · GrahamPatents in suitUS 7,881,150
Holdings, summaries, rulings, issues, outcomes, winners and claim constructions shown for a decision were generated by a large language model reading the opinion. They are a guide to the decision, not the decision. Confirm every one against the court's own text before relying on it. Outcomes read from the patent owner’s side. Party names are extracted from the decision and are missing on about 900 short Director denials and scans, which carry the trial number instead.