• Mastercard International Inc. v. Leon StamblerAll claims unpatentable
  PTAB · Jul 6, 2016 · CBM2015-00044 · APJ Peter P Chen · CBM · Final written decision

  Claims 51 and 53 are unpatentable as anticipated by Davies; claims 51, 53, 55, and 56 are unpatentable as obvious over Davies and Meyer; claim 55 over Davies and Nechvatal; and claim 56 over Davies, …

  RulingsFinal written decision

  • Skill levelSkill level board ownOther

    “F. Level of Ordinary Skill in the Art Petitioner’s proposal for the level of ordinary skill in the art is “at least a bachelors degree in computer programming and two years’ experience as a programmer or developer in the field of computer science, with a working understanding of cryptographic operations for transforming original input into a coded output using a known algorithm.” Pet. 14–15. Patent Owner has proposed similarly, that one of ordinary skill in the art would possess “(1) undergraduate education in mathematics, physics, computer science, electrical engineering or similar technical subject; and (2) either postgraduate education in networking, cryptography, or other discipline encompassing information theory, or equivalent experience with applications involving communication of financial, military, medical or similarly sensitive data over secure and non-secure networks.” Prelim. Resp. 30–31. We determine that an express definition of the level of ordinary skill is not required. The level of ordinary skill in the art can be reflected in the cited prior art references. See Okajima v. Bourdeau, 261 F.3d 1350, 1355 (Fed. Cir. 2001) (“[T]he absence of specific findings on the level of skill in the art does not give rise to reversible error ‘where the prior art itself reflects an appropriate level and a need for testimony is not shown.’”) (internal quotations omitted); In re GPAC Inc., 57 F.3d 1573, 1579 (Fed. Cir. 1995). Therefore, we find the level of ordinary skill in the art to be reflected in the cited references.” slip op. at 16

  • Claim Construction › Threshold & procedure › Whether a term needs construction (O2 Micro)Term construed board ownDecided for petitioner

    “1. “variable authentication number (VAN)” In the Decision to Institute, we construed the term “variable authentication number” or “VAN” as “a variable number resulting from a coding operation that can be used in verifying the identity of a party or the integrity of information or both.” Dec. to Inst. 8. See also Case IPR2014-00694, slip op. at 8–9 (PTAB Oct. 31, 2014) (Paper 10). Patent Owner “does not challenge this construction.” PO Resp. 16–17. Patent Owner asserts additional construction of the term is necessary for CBM standing issues, but does not elaborate further. PO Resp. 1. Patent Owner also argues we incorrectly applied the broadest reasonable interpretation to the term in the Decision to Institute. PO Resp. 9. The Decision to Institute noted that our review of the claims of the expired ’302 patent is similar to that of a district court’s review, In re Rambus, Inc., 694 F.3d 42, 46 (Fed. Cir. 2012); Phillips v. AWH Corp., 415 F.3d 1303, 1327 (Fed. Cir. 2005), but inadvertently mentioned the broadest reasonable interpretation standard in construing this term. Dec. to Inst. 7–8. We reaffirm our agreement with Patent Owner that the Phillips framework is applied to the expired ’302 patent. Our construction of “VAN” is the same under either claim construction standard. We reject Patent Owner’s undeveloped argument regarding standing, and maintain the construction of VAN from the Decision to Institute, as the ordinary and customary meaning of the term: “a variable number resulting from a coding operation that can be used in verifying the identity of a party or the integrity of information or both.”” slip op. at 10

  • Claim Construction › Intrinsic evidence (Phillips canons) › Plain and ordinary meaning to a POSITATerm construed patent owner constructionDecided for patent owner

    “2. Sequence of method steps: receiving, generating In the Decision to Institute, we agreed with Patent Owner and construed the sequence of method steps in independent claim 51 to mean that at least a portion of the receiving step must precede the generating step. Dec. to Inst. 8. See also Case IPR2014-00694, slip op. at 11–14 (PTAB Oct. 31, 2014) (Paper 10). We maintain that construction as the ordinary and customary meaning of the sequence of the receiving and generating method steps.” slip op. at 11

  • Claim Construction › Intrinsic evidence (Phillips canons) › Preamble limiting or notPreamble limitingDecided for patent owner

    “intended use of an invention is generally not treated as limiting the scope of the claim. Boehringer Ingelheim Vetmedica, Inc. v. Schering-Plough Corp., 320 F.3d 1339, 1345 (Fed. Cir. 2003). However, “a preamble limits the invention if it recites essential structure or steps, or if it is ‘necessary to give life, meaning, and vitality’ to the claim.” Catalina Mktg. Int'l, Inc. v. Coolsavings.com, Inc., 289 F.3d 801, 808 (Fed. Cir. 2002) (citing Pitney Bowes Inc. v. Hewlett-Packard Co., 182 F.3d 1298, 1305 (Fed. Cir. 1999). “The effect preamble language should be given can be resolved only on review of the entirety of the patent to gain an understanding of what the inventors actually invented and intended to encompass by the claim.” Corning Glass Works v. Sumitomo Elec. U.S.A., Inc., 868 F.2d 1251, 1257 (Fed. Cir. 1989). When the limitations in the body of the claim rely upon or derive essential structure from the preamble elements, e.g., the preamble serves as an antecedent basis for limitations in the claim, then the preamble acts as a necessary component of the claimed invention and is limiting. See Eaton Corp. v. Rockwell Int’l Corp., 323 F.3d 1332, 1339 (Fed. Cir. 2003). In this case, the preamble of independent claim 51 recites “a credential being previously issued,” and the limitations of the claim include “determining whether the at least a portion of the received funds transfer information is authentic by using the VAN and the credential information.” Ex. 1001, 33:18–19, 33:29–31. Thus, the preamble’s recitation of “a credential” is an antecedent basis for the recited “the credential information” in the “determining” step, and we determine that the preamble limits the scope of the challenged independent claim 51 and dependent claims 53, 55, and 56.” slip op. at 11

  Patent outcomesUS 5,793,302 unpatentable
  Claim construction§ 102 anticipation§ 103 obviousnesscites Phillips · KSR · Graham
  Patents in suitUS 5,793,302
• Corelogic, Inc. v. Boundary Solutions, Inc.No claims unpatentable
  PTAB · May 19, 2016 · IPR2015-00219 · APJ Lynne E Pettigrew · IPR · Final written decision

  Claims 12–15 and 17–21 were not shown unpatentable because Oosterom did not disclose searching the database using a jurisdictional identifier.

  RulingsFinal written decision

  • Claim Construction › Threshold & procedure › Whether a term needs construction (O2 Micro)Term construed board ownDecided for patent owner

    “In the Institution Decision, we construed “jurisdictional identifier” to mean “a number or other name, code, or description that identifies a jurisdiction.” Dec. 6. We based our construction on the only appearance of “jurisdictional identifier” in the written description of the ’352 patent, which states: FIG. 3 illustrates a USA County Boundary Map (USACM). This is a public domain boundary file of each and every of the 3140 counties within the United States. Each of these polygons is geocoded with its county name and FIPS number, a numerical jurisdictional identifier, as illustrated in the figure. Ex. 1001, 8:48–53 (emphasis added).3 BSI does not challenge our construction of “jurisdictional identifier” in its Patent Owner Response, see PO Resp. 6, nor does CoreLogic challenge the construction in its Reply, see Reply 10. For this Final Written Decision, after considering the complete record, we maintain our construction of “jurisdictional identifier” as “a number or other name, code, or description that identifies a jurisdiction.”” slip op. at 5

  • Novelty / Anticipation (§102) › Anticipation standard (single reference, every element)Not shown unpatentableNot shown unpatentable

    “Having reviewed the arguments and evidence, we are not persuaded CoreLogic has demonstrated that Oosterom discloses searching the parcel map database “using a jurisdictional identifier” as recited in claim 12. Among the attributes in Oosterom’s parcel and boundary tables identified by CoreLogic in its analysis, only the municipality codes (i.e., “municip” in the parcel table and “L_municip” and “R_municip” in the boundary table) qualify as “jurisdictional identifiers.” See Ex. 1010, 513–14 (Tables 1, 2). The “object_id” of an object, e.g., a parcel or a boundary, is a nationwide unique identifier, but there is no indication in Oosterom that the object_id of a parcel or boundary identifies a jurisdiction. See id. at 512; see also id. at 513–14 (showing object_id attribute in parcel and boundary tables). As for the “ogroup” attribute in the parcel and boundary tables, Oosterom states only that it “indicates to which group the record belongs.” Id. at 519. Nothing in Oosterom describes the ogroup as identifying a jurisdiction. Although the municipality code attributes in the parcel and boundary tables identify jurisdiction, CoreLogic does not cite any portion of Oosterom that illustrates the use of municipality codes in searching the database for selected parcels as required by claim 12. See Pet. 45. Dr. Goodchild opines that the “municipality code . . . would allow us to search [the] parcel table by that jurisdiction and to identify all the parcels in that jurisdiction.” Ex. 2010, 19:22–24. He further testifies that in his analysis, he “was concerned with the specific kind of query identified in the claim, which is much narrower than Oosterom’s discussion [and] much more specific than the broad range of queries discussed by Oosterom.” Id. at 21:14–25. Ultimately, he states that the “question [he] analyzed is whether [Oosterom’s] database is capable of supporting the type of query identified in the claim.” Id. at 22:14–16 (emphasis added). Dr. Goodchild’s testimony that municipality codes could be used in searching Oosterom’s database, however, is insufficient to establish for anticipation purposes that Oosterom discloses the step of searching a multi-jurisdictional digital parcel map database for a selected parcel boundary polygon “using a jurisdictional identifier.”” slip op. at 10

  • ExcludeOther

    “C. CoreLogic’s Motion to Exclude Evidence CoreLogic moves to exclude the redirect testimony of BSI’s expert, Mr. William Huxhold, on the ground that it was provided in response to leading questions. Mot. Excl. 1 (citing Ex. 1034, 150:6–153:8). The redirect testimony relates to a portion of Mr. Huxhold’s cross-examination testimony. Id. at 1–2 (citing Ex. 1034, 72:5–22). Because we do not rely on Mr. Huxhold’s testimony, CoreLogic’s motion is dismissed as moot.” slip op. at 12

  Patent outcomesUS 8,065,352 not shown unpatentable
  Claim construction§ 102 anticipation
  Patents in suitUS 8,065,352
• Sandisk Corporation v. Netlist, Inc.Rehearing denied
  PTAB · Apr 27, 2016 · IPR2014-00970 · APJ Linda M Gaudette · IPR · Rehearing

  Denied SanDisk’s rehearing request; the Board maintained its findings that claims 2, 5, and 6 were not shown obvious over Huang and claims 17–19 and 35 were not shown anticipated by Averbuj.

  RulingsRehearing decision

  • RehearingRehearing, deniedDenied

    “II. STANDARD OF REVIEW The party requesting rehearing has the burden of showing the decision should be modified, and “[t]he request must specifically identify all matters the party believes the Board misapprehended or overlooked, and the place where each matter was previously addressed in a motion, an opposition, or a reply.” 37 C.F.R. § 42.71(d).” slip op. at 3

  • BurdenNot shown unpatentable

    “20–21 (“Averbuj discloses that in BIST mode, the multiplexer 46 shown in Fig. 6 selectively inputs signals BIST_ADDR/CTRL (i.e., address and control signals from the control module) to the address and control port of the corresponding memory device 12.” (emphasis added)). In other words, the Petition is devoid of any discussion of BIST_EN in connection with the limitations of claims 17–19 and 35. See Pet. 19–21. Likewise, the Reply fails to contain any discussion of how the claim limitations are met by Averbuj’s use of the BIST_EN signal. See Reply 17. 37 C.F.R. § 42.22(a)(2) requires each petition to include “[a] full statement of the reasons for the relief requested, including a detailed explanation of the significance of the evidence including material facts, and the governing law, rules, and precedent.” Our discussion in the Final Decision of the patentability challenge as to claims 17–19 and 35 based on anticipation by Averbuj addresses Petitioner’s arguments in the Petition and Reply, which are limited to a contention that Averbuj’s multiplexer 46 is required to meet the “configured to selectively input” and “selectively inputs” limitations recited in claims 17–19 and 35. See Final Dec. 44–46 (citing Pet. 19–21; Reply 17). In arguing that we should have considered Dr. Alpert’s testimony that Averbuj’s sequencer, by generating a BIST_EN signal, is “configured to selectively input”/“selectively inputs” address and control signals to the memory modules, Petitioner attempts to improperly incorporate arguments into its Petition and Reply by reference to Dr. Alpert’s declaration testimony. See 37 C.F.R. § 42.6(a)(3) (“Arguments must not be incorporated by reference from one document into another document.”). In any event, we find the declaration testimony relied on by Petitioner in support of this Request (see Req. Reh’g 13) supports our determination that Petitioner failed to show, by a preponderance of the evidence, that Averbuj anticipates claims 17–19 and 35. Dr. Alpert testified that if the “configuration [to selectively input to the address and control ports] is determined to require the structure that performs the selection itself, then the disclosed control module also includes multiplexer 46 of memory interface 41.” Ex. 1007 ¶ 78 (emphasis added); see also id. ¶ 81 (identifying multiplexer 46 as the “DRAM controller which performs the selective inputting” as recited in claim 18). Petitioner did not explain (see Pet. 19–21; Reply 17) how Averbuj describes multiplexer 46 as being part of sequencer 8 (the alleged control module). See Final Dec. 45–46 (explaining that Petitioner has not addressed Patent Owner’s argument that the device that selectively inputs address and control signals to memory modules 12 is multiplexer 46 of memory interface 41 (the alleged data handler), not sequencer 8 (the alleged control module)). In sum, for the above reasons, we are not persuaded of error in our determination that Petitioner did not meet its burden to establish unpatentability of claims 17–19 and 35 under 35 U.S.C. § 102(b) based on Averbuj.” slip op. at 11

  • Obviousness (§103) › Motivation to combine / reasonable expectation of successNot shown unpatentableMotivation not foundNot shown unpatentable

    “Huang and Tsern, Petitioner relied on the declaration testimony of its expert, Dr. Donald Alpert (Ex. 1007). See, e.g., id. at 44 (citing Ex. 1007 ¶ 222 in support of its challenge as to claim 2). In concluding Petitioner had not demonstrated a reasonable likelihood it would prevail in showing that claims 2, 5, and 6 would have been obvious over Huang in view of Tsern, we said the following: Dr. Alpert’s opinion that a person of ordinary skill in the art would have been motivated to combine Huang and Tsern . . . is either unsupported or relies on disclosure in the ’434 patent Detailed Description. See, e.g., Ex. 1007 ¶¶ 193, 199, and 206. . . . [T]here is no evidence on this record that the cited portions of the ’434 patent are a description of prior art. Moreover, Dr. Alpert’s statements lack sufficient articulated reasoning with rational underpinning as to why an ordinary artisan at the time of the invention would have had a reason to combine the prior art elements in the manner required by the challenged claims.” slip op. at 4

  • Novelty / Anticipation (§102) › Anticipation standard (single reference, every element)Not shown unpatentableNot shown unpatentable

    “statement of the reasons for the relief requested, including a detailed explanation of the significance of the evidence including material facts, and the governing law, rules, and precedent.” Our discussion in the Final Decision of the patentability challenge as to claims 17–19 and 35 based on anticipation by Averbuj addresses Petitioner’s arguments in the Petition and Reply, which are limited to a contention that Averbuj’s multiplexer 46 is required to meet the “configured to selectively input” and “selectively inputs” limitations recited in claims 17–19 and 35. See Final Dec. 44–46 (citing Pet. 19–21; Reply 17). In arguing that we should have considered Dr. Alpert’s testimony that Averbuj’s sequencer, by generating a BIST_EN signal, is “configured to selectively input”/“selectively inputs” address and control signals to the memory modules, Petitioner attempts to improperly incorporate arguments into its Petition and Reply by reference to Dr. Alpert’s declaration testimony. See 37 C.F.R. § 42.6(a)(3) (“Arguments must not be incorporated by reference from one document into another document.”). In any event, we find the declaration testimony relied on by Petitioner in support of this Request (see Req. Reh’g 13) supports our determination that Petitioner failed to show, by a preponderance of the evidence, that Averbuj anticipates claims 17–19 and 35. Dr. Alpert testified that if the “configuration [to selectively input to the address and control ports] is determined to require the structure that performs the selection itself, then the disclosed control module also includes multiplexer 46 of memory interface 41.” Ex. 1007 ¶ 78 (emphasis added); see also id. ¶ 81 (identifying multiplexer 46 as the “DRAM controller which performs the selective inputting” as recited in claim 18). Petitioner did not explain (see Pet. 19–21; Reply 17) how Averbuj describes multiplexer 46 as being part of sequencer 8 (the alleged control module). See Final Dec. 45–46 (explaining that Petitioner has not addressed Patent Owner’s argument that the device that selectively inputs address and control signals to memory modules 12 is multiplexer 46 of memory interface 41 (the alleged data handler), not sequencer 8 (the alleged control module)). In sum, for the above reasons, we are not persuaded of error in our determination that Petitioner did not meet its burden to establish unpatentability of claims 17–19 and 35 under 35 U.S.C. § 102(b) based on Averbuj.” slip op. at 11

  § 102 anticipation§ 103 obviousness
  Patents in suitUS 8,001,434
• Arista Networks, Inc. v. Cisco Systems, Inc.Institution denied
  PTAB · Apr 12, 2016 · IPR2016-00018 · APJ Peter P Chen · IPR · Institution

  The Board denied institution because Arista did not show a reasonable likelihood that claims 1, 2, 6–9, 12, 13, and 17–20 were unpatentable over Chau or Chau and Wils.

  RulingsInstitution decision

  • PTAB / AIA Trials › Institution threshold (reasonable likelihood / more likely than not)Institution denied meritsInstitution denied

    “review of claims 1, 2, 6–9, 12, 13, and 17–20 of U.S. Patent No. 8,051,211 B2 (Ex. 1001, “the ’211 patent”). Paper 2 (“Pet.”). Patent Owner, Cisco Systems, Inc., filed a Preliminary Response. Paper 7 (“Prelim. Resp.”). Institution of an inter partes review is authorized by statute when “the information presented in the petition . . . and any response . . . shows that there is a reasonable likelihood that the petitioner would prevail with respect to at least 1 of the claims challenged in the petition.” 35 U.S.C. § 314(a); see 37 C.F.R. § 42.108. Upon consideration of the Petition and the Preliminary Response, we are not persuaded Petitioner has demonstrated a reasonable likelihood that it would prevail in establishing the unpatentability of claims 1, 2, 6–9, 12, 13, and 17–20 of the ’211 patent. Accordingly, we do not institute an inter partes review.” slip op. at 2

  • BurdenNot shown unpatentable

    “Petitioner’s only apparent contention for Chau’s disclosure that the first and second LANs are both usable for simultaneous transmission “subsequent to” the aggregation of LANs, is that “the simultaneous transmission occurs as a result of the grouping of the first LAN (channel C2) and second LAN (channel C1).” Pet. 19–20, citing Ex. 1014 ¶ 54. The Lin declaration is similarly worded, and like the Petition, is silent as to whether Chau’s alleged simultaneous transmission occurs “subsequent to,” i.e., after the aggregation of LANs. Petitioner’s argument of simultaneous transmission occurring “as a result of” alleged aggregation of LANs is unavailing, because “subsequent to” means, “after,” not “as a result of.” In fact, in the related ’975 IPR, we expressly rejected the Patent Owner’s proposed construction of “as a result of” for “subsequent to.” See Section II.A. Neither the Petition nor the Lin declaration (Ex. 1014) cite any evidence of simultaneous transmission occurring “after” aggregation of LANs in Chau. Accordingly, we are not persuaded that Petitioner’s showing demonstrates a reasonable likelihood that it would prevail as to claim 1 being anticipated by Chau.” slip op. at 11

  • Claim Construction › Intrinsic evidence (Phillips canons) › Plain and ordinary meaning to a POSITAPlain and ordinary meaningDecided for patent owner

    “In addition, as we determined in the ’975 IPR, for purposes of this decision, we determine that the broadest reasonable construction of “subsequent to” is its ordinary and customary meaning, namely, “after.” See Case IPR2015-00975, slip op. at 7–8 (PTAB Oct. 6, 2015) (declining to adopt Patent Owner’s proposed construction of “as a result of” for “subsequent to”).” slip op. at 7

  • Novelty / Anticipation (§102) › Anticipation standard (single reference, every element)Not shown unpatentableNot shown unpatentable

    “Petitioner’s only apparent contention for Chau’s disclosure that the first and second LANs are both usable for simultaneous transmission “subsequent to” the aggregation of LANs, is that “the simultaneous transmission occurs as a result of the grouping of the first LAN (channel C2) and second LAN (channel C1).” Pet. 19–20, citing Ex. 1014 ¶ 54. The Lin declaration is similarly worded, and like the Petition, is silent as to whether Chau’s alleged simultaneous transmission occurs “subsequent to,” i.e., after the aggregation of LANs. Petitioner’s argument of simultaneous transmission occurring “as a result of” alleged aggregation of LANs is unavailing, because “subsequent to” means, “after,” not “as a result of.” In fact, in the related ’975 IPR, we expressly rejected the Patent Owner’s proposed construction of “as a result of” for “subsequent to.” See Section II.A. Neither the Petition nor the Lin declaration (Ex. 1014) cite any evidence of simultaneous transmission occurring “after” aggregation of LANs in Chau. Accordingly, we are not persuaded that Petitioner’s showing demonstrates a reasonable likelihood that it would prevail as to claim 1 being anticipated by Chau.” slip op. at 11

  Claim construction§ 102 anticipation§ 103 obviousness
  Patents in suitUS 8,051,211
• Smart Modular Technologies Inc. v. Netlist, Inc.No claims unpatentable
  PTAB · Mar 9, 2016 · IPR2014-01372 · APJ Linda M Gaudette · IPR · Final written decision

  The Board held claims 1–4, 14–20, 27, and 29 not unpatentable because Averbuj did not disclose a control module configured to generate the claimed address signals.

  RulingsFinal written decision

  • Skill levelSkill level petitioner adoptedDecided for petitioner

    “Based on a comparison of Dr. Bagherzadeh’s and Dr. Sechen’s declarations (Exs. 1009, 2019), we find Dr. Bagherzadeh has a broader range of educational and work experience, and, therefore, accord greater weight to his opinion as to the level of ordinary skill in the art. Dr. Bagherzadeh’s opinion is consistent with our finding as to the level of ordinary skill in the art in our Final Written Decision in IPR-970. We, therefore, adopt our finding in IPR-970 as to the level of ordinary skill in the art: [A] person of ordinary skill in the art at the time of the ’434 patent would have a Bachelor’s degree in electrical engineering, computer engineering, or in a related field and at least one year of work experience relating to memory systems, and would be familiar with the design of memory devices, memory modules, and BIST. IPR-970 FWD, 10–11 (noting that our finding was “based on our review of the ’434 patent and the types of problems and solutions described in the ’434 patent and cited prior art”).” slip op. at 10

  • Expert testimonyPetitioner expert discountedDecided for patent owner

    “We are not persuaded by Dr. Bagherzadeh’s testimony because it is devoid of specific facts and analysis as to what led him to conclude that a person of ordinary skill in the art would interpret the claim term “generate” in the manner Petitioner proposes. See id. Dr. Bagherzadeh does not explain how the IEEE definition supports an interpretation of generate as “cause or initiate transmission,” terms that do not appear in the IEEE definition. See id. Nor does Dr. Bagherzadeh identify other extrinsic evidence which he believes to be consistent with an interpretation of “generate” as meaning “cause or initiate transmission.” See id. Likewise, Dr. Bagherzadeh has not explained why he believes the ’434 patent “describe[s] generating as initiating or transmitting” (Ex. 1009 ¶ 28), as these terms do not appear in the cited portions of the ’434 patent. See Ex. 1008, 6:3–5, 10:67–11:2, 6:14–17. Accordingly, Dr. Bagherzadeh’s testimony does not persuade us to accept Petitioner’s interpretation of “generate” as meaning “cause.”” slip op. at 15

  • Claim Construction › Intrinsic evidence (Phillips canons) › Plain and ordinary meaning to a POSITATerm construed patent owner constructionDecided for patent owner

    “supports a finding that a customary meaning of “generate” to one of ordinary skill in the art is “cause.”1 We, therefore, determine the broadest reasonable 1 Petitioner relies on Webster’s II, for a definition of “cause.” See Reply 4, 6–8 (citing Ex. 1032, 3). Having determined the broadest reasonable interpretation of “generate” does not encompass “cause,” we do not find this evidence relevant to our claim construction analysis. construction of “generate” is “produce” for the reasons stated above and in our Final Written Decision in IPR-970. We adopt and incorporate by reference our analysis and construction of the term “generate” in our Final Written Decision in IPR-970 (IPR-970 FWD, 24–33).” slip op. at 16

  • Novelty / Anticipation (§102) › Anticipation standard (single reference, every element)Not shown unpatentableNot shown unpatentable

    “Moreover, the evidence in this proceeding fails to support a finding that Averbuj’s BIST controller 4 is configured to generate address signals for testing the memory devices in the manner claimed. In Averbuj, the algorithms (i.e., CMD_DATA containing OP CODE such as SET ADDRESS (see Ex. 1011, 4:4–12, 5:19–21, Table 1)) communicated to sequencers 8 are either received by user interface 22 via external input (id. at 5:41–43) or generated by another component (i.e., a component that is not part of BIST controller 4 circuitry) and stored in algorithm memory 20 (see Ex. 2012, 30:23–24, 41:1–4, 54:21–22, 55:6–25, 55:20–56:9 (wherein Dr. Bagherzadeh testifies that OP CODE residing in the algorithm memory of BIST controller 4 are generated by hand or by a tool, e.g., a compiler, and that “99 percent of the designs or chips do not have a compiler on-board”)). Multiplexer 24 selects one of the algorithms (i.e., CMD_DATA) and BIST controller 4 provides to sequencers 8 the same CMD_DATA (e.g., address signals) without transformation or modification. See Ex. 1011, 4:4–12, 5:16–21; Ex. 2012, 54:8–13 (“Averbuj Figure 2, without consideration of any other disclosure in Averbuj, illustrates that a multiplexer selects an input from the algorithm memory and the output [] reflect[s] what’s in the input, based on the selection.”). Based on our interpretation of the terms “configured to” and “generate,” as discussed above, the claim recitation “a control module configured to generate address . . . signals for testing the memory devices” (claims 1, 20, and 29) does not read on Averbuj’s BIST controller 4, because the SET ADDRESS signal output by BIST controller 4 is produced by a component external to BIST controller 4, and merely selected by multiplexer 24 and provided to sequencers 8 without transformation or modification by BIST controller 4. In sum, after considering the parties’ arguments and evidence, we determine Petitioner has not shown, by a preponderance of the evidence, that Averbuj discloses “a control module configured to generate address . . . signals for testing the memory devices” as recited in independent claims 1, 20, and 29. Petitioner does not correct this deficiency in its challenges as to dependent claims 2–4, 14–19, and 27. See Pet. 32–39; 35 U.S.C. § 112, ¶ 4 (“A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers.”). Because Petitioner has not identified in Averbuj a teaching of each and every limitation recited in claims 1–4, 14–20, 27, and 29, Petitioner has not met its burden to show these claims are unpatentable under 35 U.S.C. § 102(b) as anticipated by Averbuj.” slip op. at 30

  Patent outcomesUS 8,001,434 not shown unpatentable
  Claim construction§ 102 anticipation
  Patents in suitUS 8,001,434
• Atoptech, Inc. v. Synopsys, Inc.All claims unpatentable
  PTAB · Jan 19, 2016 · IPR2014-01159 · APJ Peter P Chen · IPR · Final written decision

  Claims 5, 23, 24, and 27 are unpatentable as obvious; claim 31 was not shown anticipated, and claim 26 was not shown obvious.

  RulingsFinal written decision

  • Prior constructionPrior construction adoptedDecided for petitioner

    “In our Decision to Institute, we construed “place and route unit (PRU).” We determined that the broadest reasonable interpretation of that term is, “a section of the IC design created to represent the physical partitioning of the IC design.” Dec. to Inst., 10. Neither party disputes that construction in their post-institution filings.” slip op. at 10

  • Claim Construction › Intrinsic evidence (Phillips canons) › Lexicography (patentee as own lexicographer)Term construed patent owner constructionDecided for patent owner

    “in the underlying patent. In re Cuozzo, 793 F.3d at 1280; Microsoft Corporation v. Proxyconn Inc., 789 F.3d at 1298. Here, the specification expressly defines atomic blocks: Defining Atomic ("A") blocks (sometimes called units) – “A” blocks are the netlist blocks that will be physically partitioned to create place and route units (PRUs). "A" blocks may contain only standard cells or they may contain additional levels of hierarchy. For the purpose of partitioning the circuit design into PRUs, the "A" blocks are indivisible. Ex. 1001, 4:8–12. Consistent with the patentee’s express definition of atomic block, we determine the broadest reasonable interpretation of atomic block to be, “a netlist block that is indivisible for the purpose of physically partitioning the circuit design into place and route units (PRUs).”” slip op. at 11

  • Skill levelSkill level board ownDecided for petitioner

    “C. Level of Ordinary Skill in the Art Petitioner has not proposed a level of ordinary skill in the art. Patent Owner proposes that one of ordinary skill in the art would possess a “Bachelor of Science degree in Electrical Engineering, Computer Engineering, or a closely related field,” as well as “a minimum of one to two years of professional experience in the engineering development of integrated circuit technology.” Ex. 2004 (Declaration of Daniel Foty, Ph.D.), ¶ 15. At the oral hearing, Petitioner stated it had no dispute with Patent Owner’s proposal. Tr. 16:21–17:2. We determine that an express definition of the level of ordinary skill is not required. The level of ordinary skill in the art can be reflected in the cited prior art references. See Okajima v. Bourdeau, 261 F.3d 1350, 1355 (Fed. Cir. 2001) (“the absence of specific findings on the level of skill in the art does not give rise to reversible error where the prior art itself reflects an appropriate level and a need for testimony is not shown.”) (internal quotations omitted); In re GPAC Inc., 57 F.3d 1573, 1579 (Fed. Cir. 1995). Therefore, we find the level of ordinary skill in the art to be reflected in the cited references.” slip op. at 12

  • Expert testimonyPetitioner expert creditedDecided for petitioner

    “directed at efficient circuit design involving large and complex circuits, and determine that, as set forth in the VLSI textbook, FPGA is indeed a type of layout for physical design. We also credit the testimony of Dr. Ghiasi, who opines that: While Fields presents this logical approach to IC floorplanning in the context of FPGA design, one of ordinary skill as of September 2000 would have understood that the general teachings of Fields could be applied to the design of an ASIC chip as well as an FPGA chip and would have been motivated to apply the teaching of Fields to solve the problem of very large IC chip design. . . . One of ordinary skill in the field of EDA design would be familiar with IC design for both ASIC and FPGA formats and would rely on teachings in the context of FPGA chip design, especially in the front end of an EDA design flow, through floorplanning and partitioning of the physical design in addressing problems in ASIC chip design, and vice versa. Ex. 1009 ¶¶ 72–73. Even assuming arguendo the Board were to accept Patent Owner’s assertion that design of an FPGA is “completely different” from design of an integrated circuit, the Supreme Court’s decision in KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 417 (2007) stated, “[w]hen a work is available in one field of endeavor, design incentives and other market forces can prompt variations of it, either in the same field or a different one.” Thus, under KSR, such purportedly “different” teachings of Fields about FPGA design could be applicable to the physical design of an integrated circuit as described in the ’967 patent and in Su. We are persuaded by Petitioner’s evidence, including the VLSI textbook and the Ghiasi declaration, and find that one of ordinary skill in the art would have understood the applicability of Fields’ FPGA teachings to physical design of an integrated circuit as recited in claim 1 of the ’967 patent.” slip op. at 25

  Patent outcomesUS 6,567,967 unpatentable
  Claim construction§ 102 anticipation§ 103 obviousnesscites KSR
  Patents in suitUS 6,567,967
• Atoptech, Inc. v. Synopsys, Inc.All claims unpatentable
  PTAB · Jan 19, 2016 · IPR2014-01150 · APJ Peter P Chen · IPR · Final written decision

  Claims 1, 4, 8, 9, 12, 16, 19–22 are unpatentable as obvious over Fields and Su; claims 32–36 are unpatentable as anticipated by Su.

  RulingsFinal written decision

  • Skill levelSkill level board ownDecided for patent owner

    “Owner proposes that one of ordinary skill in the art would possess a “Bachelor of Science degree in Electrical Engineering, Computer Engineering, or a closely related field,” as well as “a minimum of one to two years of professional experience in the engineering development of integrated circuit technology.” Ex. 2004 (Declaration of Daniel Foty, Ph.D.), ¶ 15. At the oral hearing, Petitioner stated it had no dispute with Patent Owner’s proposal. Tr. 16:21–17:2. We determine that an express definition of the level of ordinary skill is not required. The level of ordinary skill in the art can be reflected in the cited prior art references. See Okajima v. Bourdeau, 261 F.3d 1350, 1355 (Fed. Cir. 2001) (“the absence of specific findings on the level of skill in the art does not give rise to reversible error where the prior art itself reflects an appropriate level and a need for testimony is not shown.”) (internal quotations omitted); In re GPAC Inc., 57 F.3d 1573, 1579 (Fed. Cir. 1995). Therefore, we find the level of ordinary skill in the art to be reflected in the cited references.” slip op. at 12

  • Claim Construction › Intrinsic evidence (Phillips canons) › Lexicography (patentee as own lexicographer)Term construed patent owner constructionDecided for patent owner

    “in the underlying patent. In re Cuozzo, 793 F.3d at 1280; Microsoft Corporation v. Proxyconn Inc., 789 F.3d at 1298. Here, the specification expressly defines atomic blocks: Defining Atomic ("A") blocks (sometimes called units) – “A” blocks are the netlist blocks that will be physically partitioned to create place and route units (PRUs). "A" blocks may contain only standard cells or they may contain additional levels of hierarchy. For the purpose of partitioning the circuit design into PRUs, the "A" blocks are indivisible. Ex. 1001, 4:8–12. Consistent with the patentee’s express definition of atomic block, we determine the broadest reasonable interpretation of atomic block to be, “a netlist block that is indivisible for the purpose of physically partitioning the circuit design into place and route units (PRUs).”” slip op. at 10

  • Obviousness (§103) › Analogous artAnalogous artDecided for petitioner

    “We agree with Petitioner that the ’967 patent, Fields, and Su are all directed at efficient circuit design involving large and complex circuits, and determine that, as set forth in the VLSI textbook, FPGA is indeed a type of layout for physical design. We also credit the testimony of Dr. Ghiasi, who opines that: While Fields presents this logical approach to IC floorplanning in the context of FPGA design, one of ordinary skill as of September 2000 would have understood that the general teachings of Fields could be applied to the design of an ASIC chip as well as an FPGA chip and would have been motivated to apply the teaching of Fields to solve the problem of very large IC chip design. . . . One of ordinary skill in the field of EDA design would be familiar with IC design for both ASIC and FPGA formats and would rely on teachings in the context of FPGA chip design, especially in the front end of an EDA design flow, through floorplanning and partitioning of the physical design in addressing problems in ASIC chip design, and vice versa. Ex. 1009 ¶¶ 72–73. Even assuming arguendo the Board were to accept Patent Owner’s assertion that design of an FPGA is “completely different” from design of an integrated circuit, the Supreme Court’s decision in KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 417 (2007) stated, “[w]hen a work is available in one field of endeavor, design incentives and other market forces can prompt variations of it, either in the same field or a different one.” Thus, under KSR, such purportedly “different” teachings of Fields about FPGA design could be applicable to the physical design of an integrated circuit as described in the ’967 patent and in Su. We are persuaded by Petitioner’s evidence, including the VLSI textbook and the Ghiasi declaration, and find that one of ordinary skill in the art would have understood the applicability of Fields’ FPGA teachings to physical design of an integrated circuit as recited in claim 1 of the ’967 patent.” slip op. at 19

  • Obviousness (§103) › Motivation to combine / reasonable expectation of successMotivation foundDecided for petitioner

    “directed at efficient circuit design involving large and complex circuits, and determine that, as set forth in the VLSI textbook, FPGA is indeed a type of layout for physical design. We also credit the testimony of Dr. Ghiasi, who opines that: While Fields presents this logical approach to IC floorplanning in the context of FPGA design, one of ordinary skill as of September 2000 would have understood that the general teachings of Fields could be applied to the design of an ASIC chip as well as an FPGA chip and would have been motivated to apply the teaching of Fields to solve the problem of very large IC chip design. . . . One of ordinary skill in the field of EDA design would be familiar with IC design for both ASIC and FPGA formats and would rely on teachings in the context of FPGA chip design, especially in the front end of an EDA design flow, through floorplanning and partitioning of the physical design in addressing problems in ASIC chip design, and vice versa. Ex. 1009 ¶¶ 72–73. Even assuming arguendo the Board were to accept Patent Owner’s assertion that design of an FPGA is “completely different” from design of an integrated circuit, the Supreme Court’s decision in KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 417 (2007) stated, “[w]hen a work is available in one field of endeavor, design incentives and other market forces can prompt variations of it, either in the same field or a different one.” Thus, under KSR, such purportedly “different” teachings of Fields about FPGA design could be applicable to the physical design of an integrated circuit as described in the ’967 patent and in Su. We are persuaded by Petitioner’s evidence, including the VLSI textbook and the Ghiasi declaration, and find that one of ordinary skill in the art would have understood the applicability of Fields’ FPGA teachings to physical design of an integrated circuit as recited in claim 1 of the ’967 patent.” slip op. at 19

  Patent outcomesUS 6,567,967 unpatentable
  Claim construction§ 102 anticipation§ 103 obviousnesscites KSR
  Patents in suitUS 6,567,967
• Sandisk Corporation v. Netlist, Inc.Some claims unpatentable
  PTAB · Dec 14, 2015 · IPR2014-00970 · APJ Linda M Gaudette · IPR · Final written decision

  Claims 1, 14, 15, 19–25, and 27–34 are unpatentable; the Board found other challenged claims not shown unpatentable on the grounds decided.

  RulingsFinal written decision

  • Skill levelSkill level petitioner adoptedDecided for petitioner

    “The difference in the opinions of the two experts is that Dr. Sechen believes a person of ordinary skill in the art would have an additional four years of experience, education, or a combination of the two, beyond that proposed by Dr. Alpert. See Ex. 1009 ¶ 7. According to Dr. Alpert, the difference in the proposed levels of ordinary skill in the art is not material to any dispute over claim construction or patentability in this inter partes review. Id. We accord greater weight to Dr. Alpert’s opinion as to the level of ordinary skill in the art because he has experience in both teaching students and working with engineers in the industry, while Dr. Sechen’s experience is primarily in teaching. Compare Ex. 1007 ¶¶ 7, 21 with Ex. 2012 ¶¶ 3, 5. Moreover, based on our review of the ’434 patent and the types of problems and solutions described in the ’434 patent and cited prior art, we agree with Dr. Alpert’s opinion on the level of ordinary skill. Accordingly, we find that a person of ordinary skill in the art at the time of the ’434 patent would have a Bachelor’s degree in electrical engineering, computer engineering, or in a related field and at least one year of work experience relating to memory systems, and would be familiar with the design of memory devices, memory modules, and BIST.” slip op. at 10

  • Claim Construction › Intrinsic evidence (Phillips canons) › Plain and ordinary meaning to a POSITATerm construed petitioner constructionDecided for petitioner

    “The above disclosure uses the term “operable independently” to describe the data handlers as being discrete and functioning without being physically or logically connected to each other. Based on our review of the ’434 patent, the specification and claim 27 both use the term “operable independently” in the same manner, i.e., to describe a feature of the data handler that is distinct from its data generation feature. We agree with Petitioner, therefore, that when interpreted in the context of the ’434 patent in its entirety, the claim term “operable independently” “merely means that each data handler can operate without influence or control by any of the other data handlers.” Reply 5. The ’434 patent specification uses the term “operable independently” in accordance with its plain and ordinary meaning, and we find no basis for applying the narrower construction advanced by Patent Owner to any of the challenged claims. Accordingly, we interpret “operable independently” as “operable without influence or control by another.” See Cuozzo, 793 F.3d at 1278–79.” slip op. at 19

  • Novelty / Anticipation (§102) › Anticipation standard (single reference, every element)UnpatentableUnpatentable

    “Based on the above description in Averbuj, we agree with Patent Owner that Averbuj describes memory interfaces (the alleged data handlers) that are configured to produce address and control signals, and that Averbuj describes producing address and control signals in certain circumstances, e.g., when Averbuj’s sequencer (the alleged control module) specifies writing data in a particular pattern that requires transformation to conform to a particular configuration of a memory module. See PO Resp. 33. We also agree with Petitioner, however, that Averbuj’s memory interfaces are further configured to apply to the memory modules the same address and control signals received from, and produced by, the sequencers for testing (see Reply 15), e.g., when the sequencer sends signals that can be applied, without modification or transformation (see Ex. 1003 ¶ 56), directly to a memory module irrespective of its physical configuration. Thus, Petitioner has shown, by a preponderance of the evidence, that Averbuj’s sequencer meets the limitation of “a control module configured to generate address and control signals for testing the memory devices” as recited in challenged independent claims 1, 20, and 29 of the ’434 patent.” slip op. at 41

  • Obviousness (§103) › Motivation to combine / reasonable expectation of successReasonable expectation not foundNot shown unpatentableNot shown unpatentable

    “As discussed in Section IV.B.2.e., a petition must include “[a] full statement of the reasons for the relief requested, including a detailed explanation of the significance of the evidence including material facts, and the governing law, rules, and precedent” (37 C.F.R. § 42.22(a)(2)), and “[a] reply may only respond to arguments raised in the corresponding . . . patent owner response” (37 C.F.R. § 42.23(b)). We agree with Patent Owner that the Reply does more than merely respond to or rebut arguments made in Patent Owner’s Response; rather, it sets forth a theory that was not presented clearly in the Petition. Patent Owner’s position is supported by the fact that Dr. Sechen, whose skill level is at least (and appears to exceed) that of the ordinary artisan, apparently was unable to envision how Huang and Averbuj could be combined. Further, Dr. Alpert’s second declaration includes, at a minimum, opinions as to the understanding of the ordinary artisan with respect to the teachings of Huang and Averbuj that were not presented in his first declaration. In our judgment, consideration by the Board of the above-noted arguments in the Reply and evidence presented in Dr. Alpert’s second declaration in support thereof would be improper under 37 CFR § 42.23 and unfair to Patent Owner. We have, however, reviewed and considered the arguments in the Petition and evidence therein, and are in agreement with Patent Owner that Petitioner has not provided adequate explanation or evidence to support its contention that one of ordinary skill in the art would have had a reasonable expectation of success in combining Huang and Averbuj. Accordingly, Petitioner has not met its burden to show, by a preponderance of the evidence, that claims 7–12, 17, 18, 20–25, 27, 28, and 30–35 would have been unpatentable over Huang and Averbuj.” slip op. at 59

  Patent outcomesUS 8,001,434 mixed
  Claim construction§ 102 anticipation§ 103 obviousnesscites Phillips · KSR · Graham
  Patents in suitUS 8,001,434
• Arista Networks, Inc. v. Cisco Systems, Inc.Institution denied
  PTAB · Oct 22, 2015 · IPR2015-01050 · APJ Bryan F Moore · IPR · Institution

  The Board denied institution on all challenged claims because the means-plus-function claims lacked sufficient structural disclosure and Feldmeier did not establish claim 63’s forwarding-permission limitation.

  RulingsInstitution decision

  • PTAB / AIA Trials › Institution threshold (reasonable likelihood / more likely than not)Institution denied meritsInstitution denied

    “Institution of an inter partes review is authorized by statute when “the information presented in the petition . . . and any response . . . shows that there is a reasonable likelihood that the petitioner would prevail with respect to at least 1 of the claims challenged in the petition.” 35 U.S.C. § 314(a); see 37 C.F.R. § 42.108. Upon consideration of the Petition and the Preliminary Response, we conclude the information presented does not show a reasonable likelihood that Petitioner would prevail in establishing the unpatentability of any of the challenged claims of the ’853 patent.” slip op. at 2

  • Claim Construction › Functional claiming / §112(f) means-plus-function › Corresponding structure / algorithm (indefinite if none)Decided for patent owner

    “The corresponding structure need not be explicitly identified but must disclose to a person of ordinary skill in the art what structure is identified in the specification. See Atmel Corp. v. Info. Storage Devices, Inc., 198 F.3d 1374, 1380 (Fed. Cir. 1999). It is unclear from the Specification whether the CPU, shown in Figure 2 as part of access control element 120, is the “higher-level processor” (Ex. 1001, 5:21–25), or some other processor running IOS (Ex. 1001, 1:33–37). It is also unclear which part of the access control element 120 is composed of “circuits adapted to particular process steps and data structures” (id. at 3:36–39). Here, the patent is at best unclear whether the claimed function is implemented in software executed on a general purpose CPU or in hardware as a collection of circuits. See Blackboard, Inc. v. Desire2Learn Inc., 574 F.3d 1371, 1385 (Fed. Cir. 2009) (“That ordinarily skilled artisans could carry out the recited function in a variety of ways is precisely why claims written in ‘means-plus-function’ form must disclose the particular structure that is used to perform the recited function.”). We also find that it is equally unclear whether the following means- plus-function limitations in claim 46, which appear to involve access control element 120, are implemented in hardware or in software structure (or some combination of both): “means for matching matchable information, said matchable information being responsive to said packet label, with said set of access control patterns in parallel”; “means for making a routing decision in response to said access result”; and “means for receiving a packet label responsible to a packet, said packet label being sufficient to perform access control processing for said packet.” Because the Specification of the challenged patent lacks sufficient disclosure of structure under 35 U.S.C. § 112, sixth paragraph, the scope of independent claim 46, and claims 47–52, 54, 56, and 59–62 that depend therefrom cannot be determined without speculation and, consequently, the differences between the claimed invention and the prior art cannot be ascertained. Thus, we decline to institute an inter partes review as to any ground challenging claims 46–52, 54, 56, and 59–62.” slip op. at 11

  • Novelty / Anticipation (§102) › Anticipation standard (single reference, every element)Not shown unpatentableNot shown unpatentable

    “Patent Owner argues, “Feldmeier’s packet forwarding is not the same as determining forwarding permissions (e.g., whether a packet is restricted from being transmitted from a selected source device to a selected destination device.)” Prelim. Resp. 31–32. Patent Owner further argues Feldmeier does not process a packet based on a forwarding permission. Id. We agree. Petitioner purports to show that “matching one or more characteristics of said packet with one or more access control specifiers,” recited in claim 63, results in “permission” to forward a packet. Petitioner states that “the information obtained from the CAM lookup governs the decision of whether to route or discard the packet.” Pet. 40 citing (Ex. 1003 ¶ 106). We note that Feldmeier discloses that “[a]ddress filtering is a process similar to address translation, except that rather than retrieving the data associated with an address, the process simply determines whether the address exists in a table of addresses.” Ex. 1005, 1:19–22. Feldmeier further discloses that “[t]he term address translation, as used herein, includes both address translation and address filtering operations.” Id. at 1:22–24. Also, as cited by Petitioner (Pet. 40), “Demultiplexer 1430 routes the packet . . . to either output packet queue 1450 or to discard line 1460 depending on the signal received from network address lookup 1440.” Ex. 1005, 13:24– 27. Finally, “[n]etwork address lookup 1440 is an apparatus for performing hierarchical address translations according to an embodiment of the invention.” Id. at 13:19–22. These passages suggest that a translation that yields no match (filtering) results in the packet being sent to the discard line. In contrast, the Specification supports that a successful match leading to a forwarding permission is contemplated by the claims. Ex. 1001, 7:1–12, 27–39 (determining an input or output permission by, among other things, “determining all of the successful matches”). Based on the above passages, Petitioner has not shown evidence that an affirmative match in Feldmeier results in a permission of packet forwarding, as required by claim 63. For the reasons stated above, we determine Petitioner has not shown sufficiently that Feldmeier discloses all of the limitations of independent claim 63. Accordingly, the information presented does not show a reasonable likelihood that Petitioner would prevail in showing that claim 63 is anticipated by Feldmeier.” slip op. at 14

  Claim construction§ 102 anticipationcites Phillips
  Patents in suitUS 7,023,853
• Arista Networks, Inc. v. Cisco Systems, Inc.Institution denied
  PTAB · Oct 22, 2015 · IPR2015-01049 · APJ Bryan F Moore · IPR · Institution

  The Board denied institution on all challenged claims because Petitioner did not show a reasonable likelihood of prevailing on any asserted ground.

  RulingsInstitution decision

  • PTAB / AIA Trials › Institution threshold (reasonable likelihood / more likely than not)Institution denied meritsInstitution denied

    “(“Prelim. Resp.”). Institution of an inter partes review is authorized by statute when “the information presented in the petition . . . and any response . . . shows that there is a reasonable likelihood that the petitioner would prevail with respect to at least 1 of the claims challenged in the petition.” 35 U.S.C. § 314(a); see 37 C.F.R. § 42.108. Upon consideration of the Petition and the Preliminary Response, we conclude the information presented does not show there is a reasonable likelihood that Petitioner would prevail in establishing the unpatentability of any of claims 1, 2, 5, 7– 10, 12–16, 18–22, 25, and 28–31 of the ’577 patent and, therefore, deny the Petition for inter partes review..” slip op. at 2

  • Novelty / Anticipation (§102) › Anticipation standard (single reference, every element)Not shown unpatentableNot shown unpatentable

    “We note that Feldmeier discloses that “[a]ddress filtering is a process similar to address translation, except that rather than retrieving the data associated with an address, the process simply determines whether the address exists in a table of addresses.” Ex. 1005, 1:19–22. Feldmeier further discloses that “[t]he term address translation, as used herein, includes both address translation and address filtering operations.” Id. at 1:22–24. Also, as cited by Petitioner, “Demultiplexer 1430 routes the packet . . . to either output packet queue 1450 or to discard line 1460 depending on the signal received from network address lookup 1440.” Id. at 13:24–27. Finally, “[n]etwork address lookup 1440 is an apparatus for performing hierarchical address translation[s] according to an embodiment of the invention.” Id. at 13:19–22. These passages suggest that a translation that yields no match (filtering) results in the packet being sent to the discard line. In contrast, the Specification supports that a successful match leading to a forwarding permission is contemplated by the claims. Ex. 1001, 7:1–12, 27–39 (determining an input [or output] permission by, among other things, “determining all of the successful matches”); see also Prelim. Resp. 24 (“Feldmeier never discloses that its firewall device makes a decision to permit or deny a packet based on a matching entry in the network address lookup.”). Based on the above passages, Petitioner has not shown that, even under our broad construction of access control, an affirmative match in Feldmeier can result in a modification or a denial of packet forwarding, as required by claim 1.” slip op. at 11

  • Obviousness (§103) › Motivation to combine / reasonable expectation of successNot shown unpatentableNot shown unpatentable

    “to a forwarding permission is contemplated by the claims. Ex. 1001, 7:1–12, 27–39 (determining an input [or output] permission by, among other things, “determining all of the successful matches”); see also Prelim. Resp. 24 (“Feldmeier never discloses that its firewall device makes a decision to permit or deny a packet based on a matching entry in the network address lookup.”). Based on the above passages, Petitioner has not shown that, even under our broad construction of access control, an affirmative match in Feldmeier can result in a modification or a denial of packet forwarding, as required by claim 1.” slip op. at 11

  • Claim Construction › Intrinsic evidence (Phillips canons) › Plain and ordinary meaning to a POSITATerm construed board ownDecided for petitioner

    “In a computer network for transmitting information, messages can be restricted from being transmitted from selected source devices to selected destination devices. In known computer networks, this form of restriction is known as “access control” and is performed by routers, which route messages (in the form of individual packets of information) from source devices to destination devices. Ex. 1001, 1:4–10. Patent Owner also cites certain dictionary definitions. Id. at 10–11. Patent Owner states that “modifying” transmission is “nowhere in the record.” Id. Nonetheless, Patent Owner does not explain why the embodiment cited by the Petitioner above is not relevant to construing the claims. Because the embodiment cited by Petitioner suggests that access control may be used to change the destination address of a packet, we apply a broader definition than proposed by Patent Owner. We find the broadest reasonable construction of “access control” to include restrictions or modifications on the intended destination address to which a packet is to be transmitted.” slip op. at 8

  Claim construction§ 102 anticipation§ 103 obviousness
  Patents in suitUS 6,377,577

Holdings, summaries, rulings, issues, outcomes, winners and claim constructions shown for a decision were generated by a large language model reading the opinion. They are a guide to the decision, not the decision. Confirm every one against the court's own text before relying on it. Outcomes read from the patent owner’s side. Party names are extracted from the decision and are missing on about 900 short Director denials and scans, which carry the trial number instead.