• Mycroft Ai Inc. v. Voice Tech CorporationAll claims unpatentable
  PTAB · May 4, 2022 · IPR2020-01739 · APJ John F Horvath · IPR · Final written decision

  Claims 2, 3, 6, 7, 11–14, 18, 19, 23–26, 30, and 31 are unpatentable as anticipated or obvious over McConnell, or obvious over McConnell and Roese.

  RulingsFinal written decision

  • Skill levelSkill level board ownDecided for patent owner

    “The field of endeavor is determined “by reference to explanations of the invention’s subject matter in the patent application, including the embodiments, function, and structure of the claimed invention.” In re Bigio, 381 F.3d 1320, 1325–26 (Fed. Cir. 2004). The field, however, “is not limited to the specific point of novelty, the narrowest possible conception of the field, or the particular focus within a given field.” Unwired Planet, LLC v. Google Inc., 841 F.3d 995, 1001 (Fed. Cir. 2016). The ’348 patent broadly identifies its field of invention as “computer operating systems” and narrowly as “using voice commands from a mobile device to remotely access and control a computer.” Ex. 1001, 1:8–13. But the patent discloses the mobile device can be a “laptop” connected to the remote computer via a wired communication medium 114 and a cable or DSL modem. Id. at 2:41– 47, 3:5–8, 5:7–28, 7:60–9:67. We discern no difference between controlling a remote computer using voice commands received from a laptop connected to the remote computer via a modem and wired communications network or using voice commands received from a similarly connected and non-mobile desktop computer. Thus, we find the field of endeavor to be voice activated computing rather than voice activated computing using a mobile device. Given that field of endeavor and the level of skill in the art illustrated in the ’348 patent and the prior art of record, we find a person of ordinary skill in the art would have had a bachelor’s degree in electrical engineering, computer science, or a related field and approximately three years of work experience in voice activated computing. That said, our findings below do not depend on a precise definition of either the field of invention or the required level of experience in that field and would not have changed had we” slip op. at 9

  • Claim Construction › Threshold & procedure › Whether a term needs construction (O2 Micro)No construction neededNot reached

    “demonstrate the unpatentability of certain claims over Balakrishnan and Wong because we questioned whether “Balakrishnan’s audio command interface decodes audio data into a command by outputting a phoneme network” as Petitioner contends. Dec. Inst. 38. Petitioner argues the term “command” has its plain and ordinary meaning and does not require express construction and that Balakrishnan’s “phoneme network is a command” under the plain and ordinary meaning of that term. Pet. Reply 3, 19. Patent predetermined type of computer operation that is defined by an instruction,” and Balakrishnan’s “phoneme network . . . does not disclose or teach a command.” PO Resp. 16, 43. We need not resolve this dispute or construe the meaning of the term “command” because we determine that all challenged claims are unpatentable over McConnell, either alone or in combination with Roese, and that determination does not depend on the meaning of the term “command.” See Nidec, 868 F.3d at 1017.” slip op. at 10

  • Claim Construction › Intrinsic evidence (Phillips canons) › Plain and ordinary meaning to a POSITAPlain and ordinary meaningDecided for petitioner

    “Upon consideration of all of the arguments and evidence provided by the parties, we maintain our preliminary finding that the term “audio command interface” has its plain and ordinary meaning and does not require express construction. We reject Patent Owner’s construction because neither the Specification nor prosecution history define or limit the meaning of an audio command interface. The Specification discloses audio command interface 108 is a component of “general purpose computer 104” that can be implemented as a combination of hardware and/or software, however, all components of a general-purpose computer can be implemented as a combination of hardware and/or software. Ex. 1001, 2:31–34, 2:48–55, Fig. 1. Thus, this portion of Patent Owner’s construction does not limit the plain and ordinary meaning of the term “audio command interface.”” slip op. at 12

  • Novelty / Anticipation (§102) › Anticipation standard (single reference, every element)UnpatentableUnpatentable

    “We agree with Petitioner. McConnell discloses or teaches using a command file to “allow[] a user to input commands to the computer 100 and to cause the interface program 300 to interface with an appropriate component to carry out the command.” Ex. 1004 ¶ 57. The command file can link to a “grammar” containing commands that “the voice recognition software 310 should recognize.” Id. Interface program 300 can control which “grammars” are listened for and limit them to “a particular context in which the user is expected to issue a spoken command.” Id. ¶¶ 49, 79. We agree with Mr. McNair that to limit selected grammars to a particular context, such as a particular application, interface program 300 would have to remember a process executed by that application. Ex. 1003 ¶ 105. Moreover, we agree with Petitioner’s example showing how McConnell discloses or teaches the remembering limitation by selecting a grammar based on weather conditions. See Pet. 31; Pet. Reply 12–13. For example, McConnell obtains weather reports from the Internet and selects a grammar based on weather conditions. Ex. 1004 ¶¶ 47, 79. We agree with Mr. McNair that interface program 300 can use the selected grammar to recognize an audio command and select an application to execute a process in response to the command. Ex. 1003 ¶ 107. In recognizing the command, interface program 300 would have “remembered” the process that obtained was used to recognize the audio command.” slip op. at 32

  Patent outcomesUS 9,794,348 unpatentable
  Claim construction§ 102 anticipation§ 103 obviousnesscites Phillips · KSR
  Patents in suitUS 9,794,348
• Analog Devices, Inc. v. Xilinx, Inc. And Xilinx Asia Pacific Pte. Ltd.Some claims unpatentable
  PTAB · May 3, 2022 · IPR2020-01624 · APJ Daniel J Galligan · IPR · Final written decision

  Claims 1–16 and 18 are unpatentable as obvious over Gauthier, Groen, and Shumarayev, with Huang for certain dependent claims; claim 17 was not shown unpatentable.

  RulingsFinal written decision

  • Skill levelSkill level board ownOther

    “speed links, or equivalent academic experience.” Pet. 5 (citing Ex. 1003 ¶¶ 18–20). At institution, we applied Petitioner’s assessment of the level of skill in the art, with the exception of the open-ended phrase “at least,” which expands the range of experience indefinitely without an upper bound. Inst. Dec. 8. During the trial, Patent Owner stated that it does not object to this level of ordinary skill. PO Resp. 7. Based on the parties’ agreement on this issue, we maintain our determination from the Institution Decision and apply that level of ordinary skill in the analysis below.” slip op. at 5

  • Claim Construction › Threshold & procedure › Whether a term needs construction (O2 Micro)No construction neededNot reached

    “The parties dispute the scope of “independent.” Petitioner argues that using separate current setting signals for separate devices describes the “independent” aspect of these claims. Pet. 31–35; see also Pet. Reply 3–9 (setting forth claim construction arguments). Patent Owner argues that the ’132 patent does not set forth a special definition for “independent” and, therefore, that the plain meaning applies—“not determined or influenced by someone or something else.” PO Resp. 9–10 (citing Ex. 2005). Thus, Patent Owner argues that “independent of” means “not determined or influenced by.” PO Resp. 8–17; PO Sur-reply 2–7. As discussed below, we conclude that Petitioner has proven obviousness of the subject matter in claims 1–16 and 18 under Patent Owner’s proposed construction, and the deficiencies in Petitioner’s contentions for claim 17 are not related to the definition of “independent.” Thus, we need not resolve this claim construction dispute to issue a final written decision on all claims. See, e.g., Realtime Data, LLC v. Iancu, 912 F.3d 1368, 1375 (Fed. Cir. 2019) (“The Board is required to construe ‘only those terms ... that are in controversy, and only to the extent necessary to resolve the controversy.’” (quoting Vivid Techs., Inc. v. Am. Sci. & Eng’g, Inc., 200 F.3d 795, 803 (Fed. Cir. 1999))).” slip op. at 6

  • Claim Construction › Functional claiming / §112(f) means-plus-function › Whether §112(f) applies (Williamson, nonce words)No construction neededNot reached

    “At institution, we preliminarily agreed with Petitioner that these phrases are means-plus-function. Inst. Dec. 13–15. Patent Owner argues that these phrases are not means-plus-function limitations and that “[e]ach claimed ‘current selection module’ is simply a circuit or collection of circuit[r]y that selects current, with additional structural limitations provided by the surrounding claim language.” PO Resp. 17–21. Patent Owner, however, also states that “[t]he Board need not construe the ‘current selection module’ terms because analysis of the prior art does not turn on claim construction.” PO Resp. 18. Patent Owner states it “is not disputing that the prior art discloses ‘current selection modules,’ per se, regardless of which claim construction the Board adopts”; rather, Patent Owner contends “that the current selection modules in the prior art fail to satisfy other claim requirements.” PO Resp. 18. Because there is no dispute between the parties the resolution of which turns on whether the “current selection module” phrases of claims 1 and 12 invoke § 112 ¶ 6, we need not resolve this issue to decide the patentability challenges before us. See Realtime Data, 912 F.3d at 1368.” slip op. at 7

  • Obviousness (§103) › Motivation to combine / reasonable expectation of successMotivation foundReasonable expectation foundDecided for petitioner

    “for the combination and that “Petitioner cites no disclosure from any of the references or background materials suggesting that the cited current supplies were known, interchangeable alternatives.” PO Resp. 60–61. We disagree. As discussed above, Shumarayev discloses separate and independent programmable current supplies for the main driver and the pre-emphasis driver. Ex. 1007, 6:10–17, 6:24–27, Fig. 6. This is an alternative to Groen’s disclosure of separately controlled current select modules (DACs 400 and 402) where DAC 402’s input reference current is the current that is output from DAC 400. Ex. 1004, 5:4–8, Fig. 4. Patent Owner also argues that making a control circuit programmable is more complex than making a non-programmable circuit because “a designer would need to add means to store what is programmed, thus involving more than simple PMOS and NMOS transistors” and requiring additional fabrication steps. PO Resp. 62–63 (citing Ex. 2001 ¶ 70). Both Groen and Shumarayev, however, disclose programmable current sources for pre-emphasis and drive circuitry. Groen’s DAC 400 produces a reference current based on a 5-bit code, and Groen’s DAC 402 produces an emphasis current based on a 3-bit code. Ex. 1004, 4:51–58, Fig. 4. Shumarayev’s driver 44a includes programmable current supplies 56a and 56b, and pre-emphasis driver 44b includes current supplies 58a and 58b that produce an “amount of current that . . . may be controlled by programming how Petitioner’s reliance on Shumarayev’s teachings of separate and independent current sources for main and pre-emphasis drivers introduces any complexity due to the need to make the current sources programmable. Patent Owner also points to Shumarayev’s statement that “there may be consequences of providing too much programmable circuitry” (Ex. 1007, 8:3–4) as suggesting that a person of ordinary skill in the art would not have had a reasonable expectation of success in combining Shumarayev’s teachings with Groen and Gauthier. PO Resp. 64 (quoting Ex. 1007, 8:3–4). According to Patent Owner, Shumarayev’s statement “suggests that the inventors of the ’132 patent, who were able to build successful circuits with independently programmable primary and pre-emphasis current levels, had to overcome various design challenges.” PO Resp. 64 (citing Ex. 2001 ¶ 72). We disagree with Patent Owner’s arguments. Groen discloses programmability to address “a need in the art for a driver circuit that can select from numerous possible data communication operating modes.” Ex. 1004, 1:32–38. The whole purpose of Groen is to accommodate different driver modes by controlling the drive and emphasis currents. Ex. 1004, 3:50–59 (Table 1), 4:1–13 (Table 2), 5:55–67. Shumarayev, similarly, teaches programmable circuitry to accommodate different “I/O standards such as LVPECL, LVDS, PCML, etc.” Ex. 1007, 6:20–23, 7:57–67. Shumarayev then teaches a simplifying alternative, namely, “replac[ing] some or all of the programmable circuitry in I/O circuits 16 with hardwired circuitry.” Ex. 1007, 8:4–7. Thus, we hardly see why a person of ordinary skill in the art would be discouraged from the combination by the alleged complexities of programmability when both Groen and Shumarayev are expressly directed to such programmability.” slip op. at 32

  Patent outcomesUS 6,975,132 mixed
  Claim construction§ 103 obviousnesscites KSR
  Patents in suitUS 6,975,132
• Analog Devices, Inc. v. Xilinx, Inc. And Xilinx Asia Pacific Pte. Ltd.All claims unpatentable
  PTAB · Apr 20, 2022 · IPR2020-01606 · APJ Daniel J Galligan · IPR · Final written decision

  Claims 1–4, 6–18, and 20–22 and proposed substitute claims 23–38 are unpatentable; substitute claim 39 is not shown unpatentable and is allowed by the motion to amend.

  RulingsFinal written decision

  • Novelty / Anticipation (§102) › Prior-art status of a reference › Printed publication / public accessibilityPrinted publication establishedDecided for petitioner

    “regular practice at the time to publish preliminary data sheets on our website, as set forth above with respect to the September 2000 Data Sheets. By contrast, data sheets marked ‘Advanced’ were kept for internal use.” Ex. 1023 ¶ 21; see also Ex. 1023 ¶ 15 (“It was Lucent’s regular practice to publish data sheets on its website, including preliminary data sheets, within a month of the date that appears on the data sheet. I was responsible for ensuring that the September 2000 Data Sheet was published to the website.”). Mr. Britton’s testimony, discussed above, shows that ORT8850 was a “preliminary” data sheet published on Lucent’s customer-facing web pages and that customers expected this document to be available. See Valve, 8 F.4th at 1374 (“We have previously held that where a publication’s purpose is ‘dialogue with the intended audience,’ that purpose indicates public accessibility.”). Accordingly, for the reasons discussed above, we deny Patent Owner’s motion to exclude Exhibit 1008 and Exhibit E and paragraph 15 (identifying Exhibit E) of the Britton declaration as hearsay or for lack of authentication.” slip op. at 16

  • Claim Construction › Threshold & procedure › Whether a term needs construction (O2 Micro)Plain and ordinary meaningNo construction neededOther

    “For the foregoing reasons, we do not agree with Patent Owner’s” slip op. at 25

  • Novelty / Anticipation (§102) › Anticipation standard (single reference, every element)UnpatentableUnpatentable

    “3. Claim 1 Independent claim 1, which is directed to “[a] high-speed receiver,” includes substantially the same subject matter as claim 15 and recites two additional limitations: “a receiver analog front-end biased in accordance with the common mode reference, wherein the receiver analog front-end is 16 Because we find that HFAN describes the “receiver termination network” recited in the preamble of claim 15, we need not decide whether the preamble is limiting. See PO Resp. 26 (arguing that the preamble of claim 15 is limiting). amplified high-speed data” and “a data recovery module operably coupled to recover data from the amplified high-speed data.” Petitioner explains how HFAN describes this subject matter. Pet. 36– 44. Petitioner argues that HFAN discloses “a receiver used in ‘high-speed communication systems,’” thereby describing the “high-speed receiver” of the preamble. Pet. 36–37 (quoting Ex. 1005, 1). For the “receiver analog front-end,” Petitioner argues that the LVPECL (low-voltage PECL) receiver receives and amplifies high-speed data. Pet. 41–42 (citing Ex. 1005, 8, Figs. 11, 16(a); Ex. 1003 ¶ 85). For the “data recovery module,” Petitioner argues that HFAN discloses using a MAX3675 chip as an LVPECL receiver, and Petitioner relies on the disclosure of a D flip-flop in DS_MAX3675 (which describes the MAX3675 chip) to show the “data recovery module.” Pet. 42–44 (citing Ex. 1005, 2, 10; Ex. 1003 ¶¶ 87–88; Ex. 1018, Fig. 1). Petitioner argues that reliance on DS_MAX3675 is appropriate in the anticipation analysis to show the details of the LVPECL receiver disclosed in HFAN. Pet. 42–43 (citing In re Baxter Travenol Labs., 952 F.2d 388 (Fed. Cir. 1991)). Other than its argument that the “receiver termination network” must be “on-chip,” which we address in the preceding section, Patent Owner does not set forth any additional arguments against Petitioner’s contentions that HFAN anticipated claim 1. We are persuaded by Petitioner’s contentions for claim 1, including its reliance on DS_MAX3675. Anticipation is established when “one skilled in the art would reasonably understand or infer from the prior art reference’s teaching that every claim [limitation] was disclosed in that single reference.” Akamai Techs., Inc. v. Cable & Wireless Internet Servs., Inc., 344 F.3d 1186, 1192–93 (Fed. Cir. 2003) (alteration in original) (quoting Dayco” slip op. at 35

  • Obviousness (§103) › Graham factors (scope of art, differences, level of skill)UnpatentableUnpatentable

    “2. Independent Claim 9 Independent claim 9 is directed to “[a] multi-gigabit transceiver” slip op. at 41

  Patent outcomesUS 7,280,590 unpatentable
  Claim construction§ 102 anticipation§ 103 obviousnesscites KSR · Graham
  Patents in suitUS 7,280,590
• Analog Devices, Inc. v. Xilinx, Inc. And Xilinx Asia Pacific Pte. Ltd.All claims unpatentable
  PTAB · Apr 14, 2022 · IPR2020-01625 · APJ Daniel J Galligan · IPR · Final written decision

  Claims 1–4 are unpatentable as anticipated by Measor; claims 1–4, 7–10, and 13–16 are also unpatentable as obvious over Measor and Xcell.

  RulingsFinal written decision

  • Skill levelSkill level petitioner adoptedDecided for petitioner

    “Petitioner contends that a person of ordinary skill in the art at the relevant time “would have had at least a bachelor’s degree in electrical engineering and 3-5 years of professional experience in high speed links, or a master’s degree and 1-2 years of professional experience in high speed links, or equivalent academic experience” and “would have been familiar with transceivers, serializers, deserializers, and would have been aware of design trends in these areas.” Pet. 5 (citing Ex. 1002 ¶¶ 18–20). Patent Owner does not specifically respond to Petitioner’s level of ordinary skill (see PO Resp.), but Patent Owner’s declarant, Dr. Ayman Fayed, “do[es] not object” to Petitioner’s proposal (Ex. 2001 ¶ 26). In the Institution Decision, we adopted Petitioner’s assessment of the level of skill in the art, with the exception of the open-ended phrase “at least,” which expands the range of experience indefinitely without an upper bound. Inst. Dec. 8–9. Based on the parties’ agreement on this issue, we maintain our determination from the Institution Decision and apply that level of ordinary skill in the analysis below.” slip op. at 5

  • Claim Construction › Threshold & procedure › Whether a term needs construction (O2 Micro)No construction neededDecided for patent owner

    “do not recite that the “desired serial data output rate” must be obtained from among multiple potential data rates. The Specification of the ’251 patent uses the term “desired” in the same way as the claims and provides no elaboration requiring multiple potential data rates. Ex. 1001, 2:29–33, 8:58– 65, 9:7–20, Fig. 11. Patent Owner, however, argues that “programmability lies at the heart of the ’251 patent” and that, because the rate must be obtained and desired, it “must be both variable (i.e., there is more than one option) and selectable (i.e., the user can change it).” PO Resp. 7 (citing Ex. 1001, codes (54), (57), 10:13, 10:16, 10:26, 11:27, 11:29–30, 12:55, 13:1–2; Ex. 2005 ¶¶ 5–6, 8). As we stated in the Institution Decision, “[w]e agree that the ’251 patent focuses on programmability.” Inst. Dec. 12. But that does not necessarily confer some requirement for a programmable signal on the claims, as Patent Owner suggests. For example, Patent Owner argues that the ’251 patent’s disclosure of different data transmission standards that require different data rates “would have required a programmable mechanism by which to select and adjust the data rate output by the serializer.” PO Resp. 8 (citing Ex. 1001, 1:58–66; Ex. 2005 ¶ 9). Patent Owner also argues that “[t]he skilled artisan would have understood that ‘obtaining a desired serial data output rate’ requires a similar signal from which to ‘obtain,’ or receive, information comprising the desired rate.” Institution Decision, the ’251 patent does not illustrate or describe a “programmable signal.” Inst. Dec. 11–13. Thus, Patent Owner’s argument would have us import limitations into the claims that are not even disclosed in the Specification.” slip op. at 7

  • Claim Construction › Functional claiming / §112(f) means-plus-function › Whether §112(f) applies (Williamson, nonce words)Not reached

    “During the trial, the parties did not address the issue of whether the “module” claim recitations invoke § 112 ¶ 6. During oral argument, the parties confirmed that none of the parties’ arguments turns on whether or not the “module” limitations are means-plus-function limitations. Tr. 5:2–20. 5 As we also noted in the Institution Decision, “[i]t is not entirely clear what Patent Owner means by a ‘programmable signal.’ The ’251 patent refers to ‘control signals’ that ‘program’ particular devices (Ex. 1001, 3:28–31), which suggests that these signals are programming signals and that the devices that are programmed by these signals are programmable.” Inst. Dec. 13 n.8. We need not explore this issue, further, however, because we reject Patent Owner’s proposed construction. ¶ 6, the determination as to whether the claims are patentable or unpatentable would be the same based on the arguments of record before us. Accordingly, because there is no dispute between the parties the resolution of which turns on whether the “module” terms invoke § 112 ¶ 6, we need not resolve this issue to decide the patentability challenges before us. See, e.g., Realtime Data, LLC v. Iancu, 912 F.3d 1368, 1375 (Fed. Cir. 2019) (“The Board is required to construe ‘only those terms ... that are in controversy, and only to the extent necessary to resolve the controversy.’” (quoting Vivid Techs., Inc. v. Am. Sci. & Eng’g, Inc., 200 F.3d 795, 803 (Fed. Cir. 1999))).” slip op. at 11

  • Novelty / Anticipation (§102) › Anticipation standard (single reference, every element)UnpatentableUnpatentable

    “As discussed above in § II.B.1, we do not agree with Patent Owner’s proposed construction of this claim limitation. For the reasons explained below, Petitioner’s contentions for this limitation are persuasive. of 2.5 Gbps. Ex. 1003 ¶¶ 33, 37, Fig. 3. In the “exemplary circuit” of Figure 3, a 1.25 GHz clock is used to produce data at 2.5 Gbps, which Measor characterizes as “a desired rate for conversion.” Ex. 1003 ¶¶ 31, 36– 37, Fig. 3. Measor’s disclosure of using a clock that is half the desired serial output data rate mirrors the ’251 patent’s own disclosure in Figure 5 highlighted by Patent Owner. See PO Resp. 5–6 (citing Ex. 1001, Figs. 5, 10). According to Patent Owner, “[t]he programmable clock divider circuitry in Figure 5 receives a data width indication 92 and an intermediate data clock 108 and generates a set of four timing signals (CLK3, CLK2, CLK1, and CLK0),” which “correspond to a multiple state control sequence for converting parallel data into serial data in Figure 10.” PO Resp. 5–6. The ’251 patent explains that, for an exemplary “20 bit parallel input data to a 5 Gbps serial data stream, the serial data clock 110 is established to be 5 GHz. The clock divider 92 is a divide by two module such that the intermediate data clock 108 is 2.5 GHz.” Ex. 1001, 5:37–40. In the ’251 patent, therefore, the clock input to the circuit that produces the multiple state control sequence is half the rate of the desired serial output data rate, just as in Measor. Thus, we find that Measor describes “obtaining a desired serial data output rate.”” slip op. at 16

  Patent outcomesUS 7,116,251 unpatentable
  Claim construction§ 102 anticipation§ 103 obviousnesscites KSR
  Patents in suitUS 7,116,251
• Analog Devices, Inc. v. Xilinx, Inc. And Xilinx Asia Pacific Pte. Ltd.All claims unpatentable
  PTAB · Apr 14, 2022 · IPR2020-01601 · APJ Daniel J Galligan · IPR · Final written decision

  Claims 2–5, 9–13, and 17–19 are unpatentable as obvious over Measor or Measor and Xcell; the additional ORT8850 grounds were not reached.

  RulingsFinal written decision

  • Skill levelSkill level petitioner adoptedOther

    “Petitioner contends that a person of ordinary skill in the art at the relevant time “would have had at least a bachelor’s degree in electrical engineering and 3-5 years of professional experience in high speed links, or a master’s in electrical engineering and 1-2 years of professional experience in high speed links, or equivalent academic experience” and “would have been familiar with transceivers, serializers, deserializers, and would have been aware of does not specifically respond to Petitioner’s level of ordinary skill (see PO Resp.), but Patent Owner’s declarant, Dr. Ayman Fayed, “do[es] not object” to Petitioner’s proposal (Ex. 2001 ¶ 27). In the Institution Decision, we adopted Petitioner’s assessment of the level of skill in the art, with the exception of the open-ended phrase “at least,” which expands the range of experience indefinitely without an upper bound. Inst. Dec. 8. Based on the parties’ agreement on this issue, we maintain our determination from the Institution Decision and apply that level of ordinary skill in the analysis below.” slip op. at 5

  • Claim Construction › Threshold & procedure › Whether a term needs construction (O2 Micro)No construction neededNot reached

    “1. Fixed Logic Signal Claims 3, 11, and 19 recite that an input of a multiplexer “is operably coupled to receive a fixed logic signal.” The parties dispute the scope of “a fixed logic signal.” Petitioner argues that Measor’s disclosure of “a fixed and expected value that just repeats” teaches “a fixed logic signal.” Pet. 64. Patent Owner argues that a “time-varying” signal like the one in Measor is not “fixed.” PO Resp. 17. Because we conclude that Petitioner has proven obviousness of the subject matter under a non-disputed understanding of the term “fixed logic signal,” we need not resolve this claim construction dispute. See, e.g., Realtime Data, LLC v. Iancu, 912 F.3d 1368, 1375 (Fed. in controversy, and only to the extent necessary to resolve the controversy.’” (quoting Vivid Techs., Inc. v. Am. Sci. & Eng’g, Inc., 200 F.3d 795, 803 (Fed. Cir. 1999))).” slip op. at 6

  • ExcludeMotion to exclude, deniedOther

    “III. PATENT OWNER’S MOTION TO EXCLUDE Patent Owner moves to exclude ORT8850 (Ex. 1015) and portions of Exhibit 1016, which is a declaration regarding ORT8850. Paper 32. Because we do not reach the grounds of unpatentability based on ORT8850 and, thus, do not rely on ORT8850, we dismiss Patent Owner’s motion as moot.” slip op. at 38

  • Obviousness (§103) › Motivation to combine / reasonable expectation of successMotivation foundReasonable expectation foundUnpatentable

    “We disagree with Patent Owner’s arguments. As the Federal Circuit has stated, “a given course of action often has simultaneous advantages and disadvantages, and this does not necessarily obviate motivation to combine.” Medichem, S.A. v. Rolabo, S.L., 437 F.3d 1157, 1165 (Fed. Cir. 2006). “Instead, the benefits, both lost and gained, should be weighed against one another.” Id. (quoting Winner Int’l Royalty Corp. v. Wang, 202 F.3d 1340, 1349 n.8 (Fed. Cir. 2000)). Dr. Stojanovic’s testimony does not show that a ring oscillator without a PLL is a viable option, as Patent Owner’s arguments suggest. See PO Resp. 9 (citing Ex. 2006, 51:22–52:10). Rather, he testified that “if you use a ring oscillator alone, yes, it’s going to be lower power -- somewhat lower power than the PLL that wraps the control loop around the same oscillator. But it’s going to perform very poorly if -- if not completely kill the performance of the link.” Ex. 2006, 51:22–52:10. Dr. Stojanovic testified that a ring oscillator without a PLL produces what is called a “free running” clock because “it cannot be controlled.” Ex. 2006, 50:9–21. Further, Patent Owner’s declarant, Dr. Fayed, agreed that, “to multiply a reference clock by a factor of more than 2, you need a PLL” and also agreed that a person of ordinary skill in the art at the time of the ’838 patent would have known that. Ex. 1025, 84:16–25. Thus, the evidence of record is that a ring oscillator alone would not be a viable option in this type of system. Based on all of this evidence, we find that the benefits of the “admittedly known” PLL (PO Resp. 7), including that it would actually work at the high frequencies required, would have outweighed any power concerns. option to be chosen, the evidence suggests that a PLL was the option most likely to be chosen. See Ex. 2006, 47:14–15 (Dr. Stojanovic testifying that “[a] phase lock loop is, I would say, the most typical clock source in these types of systems”). As Dr. Stojanovic testified, the other option suggested by Patent Owner, a ring oscillator, would not perform well, if at all, in a high-speed system. Ex. 2006, 51:22–52:10. In light of all the evidence discussed above, we find that a person of ordinary skill in the art would have been motivated to use a PLL for clock generation in Measor. See Pet. 52–54. We further find that a person of ordinary skill in the art would have had a reasonable expectation of success. As discussed above, PLLs were well-known to persons of ordinary skill in the art and were among the most likely, if not the most likely, option for high-speed clock generation. Ex. 2006, 47:14–15, 51:22–52:10. Furthermore, the ’838 patent itself assumes that a person of ordinary skill in the art can implement PLLs. The ’838 patent states that “the programmable timing circuit 82 includes a phase locked loop (PLL) 90” and that “[i]n operation, the PLL 90 generates a serial data clock 110 from a reference clock 114. For example, the reference clock 114 may be a 25 MHz clock and the serial data clock 110 may be a 5 GHz clock.” Ex. 1001, 4:49–58. The ’838 patent Specification does not mention the PLL again or disclose how the PLL operates to multiply the clock. This is not to suggest that the ’838 patent is deficient in any regard; rather, this simply shows that, because the PLL was such a well-known component, little if any description was required for the person of ordinary skill in the art.” slip op. at 13

  Patent outcomesUS 7,015,838 unpatentable
  Claim construction§ 103 obviousnesscites KSR
  Patents in suitUS 7,015,838
• Analog Devices, Inc. v. Xilinx, Inc. And Xilinx Asia Pacific Pte. Ltd.Some claims unpatentable
  PTAB · Apr 13, 2022 · IPR2020-01596 · APJ John F Horvath · IPR · Final written decision

  Claims 1–5, 8–12, and 15–17 are unpatentable as obvious over OneChip and ORT8850; claims 6, 7, 13, and 14 were not shown unpatentable because QL80FC was excluded.

  RulingsFinal written decision

  • Skill levelSkill level board ownDecided for petitioner

    “We agree with Petitioner. Dr. Nelson’s opinion that a person skilled in the art would have had at least the education and experience indicated necessarily encompasses persons having the minimum level of education and experience. It is axiomatic that something that was known or would have been obvious to a person having a minimum level of education and experience would necessarily have been known or obvious to a person having the same or a higher level of education or experience. As we indicated in our Institution Decision, “the level of skill in the art is a prism or lens through which a judge, jury, or the Board views the prior art and the claimed invention.” Okajima v. Bourdeau, 261 F.3d 1350, 1355 (Fed. Cir. 2001). In our analysis below, we consider all evidence as if viewed by a person having the minimum level of education and experience identified by Dr. Nelson, i.e., having “the equivalent of a Bachelor’s degree in electrical engineering, computer engineering, or related field and 3-5 years of professional experience in computer systems design, circuit design, or equivalent academic experience.” Ex. 1003 ¶ 6.” slip op. at 24

  • ExcludeMotion to exclude, grantedMotion to exclude, deniedGranted in part

    “the parties, we find Petitioner has failed to authenticate Exhibit 1008, and that the dates printed on the faces of Exhibit 1008 and Exhibit A of the Rosenberg declaration are hearsay. Exhibit A of the Rosenberg declaration contains two archived versions, dated September 3, 2000 and October 23, 2000, of the webpage www.quicklogic.com/devices/QuickFC/Default.html. Ex. 1019, Ex. A. The “second page” of the archived webpage contains a link entitled “QuickFC Device DataSheet.” Id. However, as Patent Owner correctly argues, “the Rosenberg Affidavit only purports to ‘attest[] to the authenticity of the archived and dated QuickFC webpages’—not the purportedly linked to [QL80FC] exhibits” and “[t]he Rosenberg Affidavit neither references QL80FC nor makes any assertion of a connection between QL80FC and the webpages shown in the printouts.” PO Resp. 53–54. Petitioner offers no testimony from a custodian of records for the QL80FC product, as they did for the ORT8850 product, to support a finding that Exhibit 1008 is what Petitioner purports it to be. See Fed.R.Evid. 901(a). Moreover, we disagree with Petitioner’s contentions that FREs 703, 901(b)(4) or 902(7) authenticate or provide a basis to forego excluding Exhibit 1008. FRE 703 allows an expert to base his or her opinion on facts or data an expert in the field would reasonably rely on, even if they are not themselves admissible. Id. 703. They do not prohibit the exclusion of inadmissible evidence or allow for the admission of otherwise excludable evidence. Although FRE 901(b)(4) does allow evidence to be admitted based on its “appearance, contents, substance, internal patterns, or other distinctive characteristics,” Petitioner has not shown that Exhibit 1008 contains sufficient distinctive characteristics to authenticate it. The only characteristic of Exhibit 1008 that tends to show that it is a QuickLogic datasheet for the QL80FC product is the appearance of QuickLogic’s name and logo on the datasheet. See Ex, 1008. But Petitioner fails to present authenticated versions of other QuickLogic data sheets to demonstrate how the structure, format, and appearance of QL80FC is consistent with their structure, format, and appearance. See Pet. Reply 22–23; Opp. 14–15. Finally, FRE 902(7) does not authenticate Exhibit 1008, it only authenticates any “inscription[s], sign[s], tag[s], or label[s]” affixed to Exhibit 1008. See Fed.R.Evid. 902(7). Accordingly, for the reasons discussed above, we find Petitioner has failed to authenticate Exhibit 1008, and we exclude Exhibit 1008 from this proceeding.” slip op. at 22

  • Claim Construction › Threshold & procedure › Whether a term needs construction (O2 Micro)No construction needed

    “1. Programmable Fabric / Programmable Fabric Circuitry Petitioner contends these terms “refer to user programmable circuitry capable of being programmed to implement arbitrary, as opposed to specific, logic functions.” Pet. 10. In our Institution Decision, we determined the precise meanings of these terms were not in dispute and, therefore, declined to expressly construe them. See Dec. Inst. 19–20 (citing Nidec Motor, 868 F.3d at 1017). Neither party disputes that finding, which we maintain here. See PO Resp. 8; Pet. Reply 3–30.” slip op. at 26

  • Claim Construction › Intrinsic evidence (Phillips canons) › Plain and ordinary meaning to a POSITATerm construed patent owner constructionDecided for patent owner

    “maintain our preliminary construction that the plain and ordinary meaning of the transceiver component limitation requires the LOS detector to be “a transceiver component having selectable values that is configured by the plurality of configuration memory cells.” The limitation requires “a plurality of transceivers containing respective components having selectable values,” wherein “said components [are] configured by . . . memory cells,” and wherein “one of said components is a loss of synchronization detector.” Ex. 1001, 6:32–36 (emphases added). Thus, the LOS detector is one of the transceiver components referred to earlier, i.e., one of “said components” “having selectable values” that is “configured by . . . memory cells.” Id. The Specification is consistent with this interpretation. It discloses a transceiver whose receiver side includes deserializer/comma detector 174, decoder 178, elastic buffer 182, CRC 186, and LOS 188.10 Id., Fig. 3. Each of these components is described as being configurable and having selectable values. Id. at 4:54–6:7. Moreover, our interpretation does not render superfluous the use of the term “configurable” in other limitations. To the contrary, the transceiver components limitation only requires transceiver components identified as “one of said components,” i.e., as one of the “respective components having selectable values” to be configurable. It does not require every transceiver component to be configurable because not every transceiver component has to be identified as “one of said components.” Thus, because the serializer and deserializer are not identified as “one of said components” in the “transceiver components” limitation, that limitation does not require that they be configurable. As a result, the claim’s later requirement of “a configurable serializer” and “a configurable deserializer” is not superfluous.” slip op. at 27

  Patent outcomesUS 7,187,709 mixed
  Claim construction§ 103 obviousnesscites Phillips · KSR
  Patents in suitUS 7,187,709
• Analog Devices, Inc. v. Xilinx, Inc. And Xilinx Asia Pacific Pte. Ltd.Some claims unpatentable
  PTAB · Apr 5, 2022 · IPR2020-01597 · APJ Russell E Cass · IPR · Final written decision

  Claims 1–5, 12, and 13 are unpatentable; claim 6 was not shown unpatentable because Young does not disclose claim 5’s flip-flop limitation.

  RulingsFinal written decision

  • Claim Construction › Functional claiming / §112(f) means-plus-function › Whether §112(f) applies (Williamson, nonce words)§112(f) does not applyDecided for patent owner

    “claim construction standard that would be used to construe the claim in a civil action under 35 U.S.C. § 282(b).” 37 C.F.R. § 42.100(b) (2019). In our Institution Decision, we agreed with Patent Owner that the phrase “modules for implementing tasks, the module being reconfigurable” in independent claims 1 and 5 was not a “means-plus-function” limitation that must be construed under 35 U.S.C. § 112, paragraph 6. Inst. Dec. 15–18. We also construed the term “module” as “logic configured to perform a task that can receive and/or transmit communication signals.” Id. at 21. In doing so, we rejected Patent Owner’s argument that “‘reconfigurable modules” are not “logic that ‘may be programmed or reconfigured’ to implement tasks,” but rather “are circuits that have already been programmed to implement tasks and can then be updated.” Id. at 18–21 (quoting Prelim. Resp. 9). In its Patent Owner Response, Patent Owner included a footnote stating that it “maintains that this limitation should be construed to require that existing modules be updatable.” PO Resp. 12, n.1. Patent Owner, however, does not provide additional elaboration or set forth arguments explaining why the reasoning in our Institution Decision is in error. See id. (“For the remainder of this Petition, however, [Patent Owner] assumes that the Board’s broader construction is correct.”). Based on the complete record, we adhere to the interpretation set forth in our Institution Decision for the reasons discussed therein. See Inst. Dec. 18–21.” slip op. at 10

  • Claim Construction › Intrinsic evidence (Phillips canons) › Plain and ordinary meaning to a POSITATerm construed board ownDecided for petitioner

    “claim construction standard that would be used to construe the claim in a civil action under 35 U.S.C. § 282(b).” 37 C.F.R. § 42.100(b) (2019). In our Institution Decision, we agreed with Patent Owner that the phrase “modules for implementing tasks, the module being reconfigurable” in independent claims 1 and 5 was not a “means-plus-function” limitation that must be construed under 35 U.S.C. § 112, paragraph 6. Inst. Dec. 15–18. We also construed the term “module” as “logic configured to perform a task that can receive and/or transmit communication signals.” Id. at 21. In doing so, we rejected Patent Owner’s argument that “‘reconfigurable modules” are not “logic that ‘may be programmed or reconfigured’ to implement tasks,” but rather “are circuits that have already been programmed to implement tasks and can then be updated.” Id. at 18–21 (quoting Prelim. Resp. 9). In its Patent Owner Response, Patent Owner included a footnote stating that it “maintains that this limitation should be construed to require that existing modules be updatable.” PO Resp. 12, n.1. Patent Owner, however, does not provide additional elaboration or set forth arguments explaining why the reasoning in our Institution Decision is in error. See id. (“For the remainder of this Petition, however, [Patent Owner] assumes that the Board’s broader construction is correct.”). Based on the complete record, we adhere to the interpretation set forth in our Institution Decision for the reasons discussed therein. See Inst. Dec. 18–21.” slip op. at 10

  • Skill levelSkill level petitioner adoptedDecided for petitioner

    “In its Preliminary Response, Patent Owner stated that it did not object to Petitioner’s proposed level of ordinary skill in the art. Prelim. Resp. 7. In our Institution Decision, we adopted Petitioner’s assessment of the level of skill in the art with the exception of the open-ended phrase “at least,” finding that this level of skill is consistent with the ’184 patent and the asserted prior art of record. Inst. Dec. 23. In its Response, Patent Owner states that it “does not object to the” level of skill in the art in the Institution Decision. PO Resp. 11–12 (citing Inst. Dec. 23); see also Ex. 2012 ¶ 57 (Dr. Brogioli’s testimony that he does “not object to the Board’s finding in the Institution Decision on the level of skill in the art.”). Based on the complete record, we adhere to the level of ordinary skill adopted in our Institution Decision. Inst. Dec. 23.” slip op. at 12

  • Novelty / Anticipation (§102) › Anticipation standard (single reference, every element)UnpatentableUnpatentable

    “We do not agree with Patent Owner’s argument that Eggers is deficient because it “does not disclose the existence of reconfiguration data for the Shift Register and Output Connections modules or any means of generating such data.” PO Resp. 13. Claim 1 does not require “reconfiguration data” or a configuration memory, and thus Eggers need not expressly disclose such data or memory to anticipate. To the extent Patent Owner argues that configuration data is necessary for a reconfigurable module, the evidence indicates that one of ordinary skill would have understood that such data would be used in the modules of Eggers. In this regard, Dr. Nelson testifies that one of ordinary skill in the art “would understand that the AT6000 device is not sold ‘out-of-the-box’ with a shift register and output connections modules pre-configured” and that “Eggers necessarily had to reconfigure the AT6000 from its default state to implement these modules,” which would require reconfiguration data. Ex. 1033 ¶ 12. Indeed, Patent Owner acknowledges that the AT600 is necessarily loaded with configuration data to configure the shift register and output connections modules on startup. PO Sur-reply 3. We also do not agree with Patent Owner’s argument that the configuration data for the shift register and output connections modules is not “reconfiguration” data because “[t]he ’184 patent establishes that ‘reconfiguration’ refers to reprogramming after startup, not programming on startup.” PO Sur-reply 3. As noted above, claim 1 does not require “reconfiguration data;” it only requires “modules” that are “reconfigurable.” Ex. 1001, 10:20–21. We therefore need not enter into a debate about the precise definition of “reconfiguration data” because the evidence shows that Eggers discloses modules that are reconfigurable, as claim 1 requires. As discussed above, one of ordinary skill would have understood that Eggers’s shift register and output connections modules are “reconfigurable” because they are created with reconfigurable logic in the Atmel AT6000. Ex. 1002 ¶¶ 92–93. Consequently, Petitioner has shown by a preponderance of the evidence that Eggers discloses limitation 1[a].” slip op. at 21

  Patent outcomesUS 7,224,184 mixed
  Claim construction§ 102 anticipation§ 103 obviousnesscites KSR · Graham
  Patents in suitUS 7,224,184
• Analog Devices, Inc. v. Xilinx, Inc. And Xilinx Asia Pacific Pte. Ltd.Some claims unpatentable
  PTAB · Apr 1, 2022 · IPR2020-01531 · APJ John F Horvath · IPR · Final written decision

  Claims 1–3, 7–9, 13–17, and 19 are unpatentable as anticipated by Xia; claims 12 and 18 were not shown unpatentable over Xia or Iwata.

  RulingsFinal written decision

  • Skill levelSkill level board ownDecided for petitioner

    “the time of the invention as someone who would have had “the equivalent of a Bachelor’s degree in electrical engineering and four or more years of experience in analog circuit design.” Pet. 6 (citing Ex. 1003 ¶ 23). In our Institution Decision, we identified a person having ordinary skill in the art at the time of the invention as someone with “a Bachelor’s degree in electrical engineering, or its equivalent, and four years of experience in analog 1 Petitioner also relies upon the Declarations of Un-Ku Moon, Ph.D. (Exs. 1003, 1031) and Sylvia Hall-Ellis, Ph.D. (Ex. 1022). Patent Owner relies on the Declaration of Dr. Marwan Hassoun (Ex. 2008). we maintain here. See PO Resp. 8; Pet. Reply 2–28.” slip op. at 6

  • Claim Construction › Intrinsic evidence (Phillips canons) › Plain and ordinary meaning to a POSITAPlain and ordinary meaningDecided for petitioner

    “Owner, we maintain our preliminary construction of the connection limitation. Claims 1 and 8 require a programmable interconnect circuit coupled between an I/O port and a plurality of ADCs that enables a connection of the ADCs to the I/O port. Ex. 1001, 14:21–26, 14:51–53, 14:57–62. Figure 9 of the ’071 patent illustrates such “a programmable interconnect circuit.” Id. at 9:20–21, Fig. 9. It can be “implemented as an ADC interface, or more particularly, the routing network 704 or 804.” Id. at 9:22–24. In Figure 10, routing network 804 “enables the coupling of the analog input signal at input/output port 604 to each of 8 ADC circuits 602.” Id. at 10:3–8, Fig. 10. In Figure 11, routing network 804 together with sampler 1102 “enable[s] t[he] routing of a sample of the analog input signal periodically change the routing of the sampled signal to a different ADC.” Id.at 10:60–11:2, Fig. 11. Thus, the programmable interconnect circuit or routing network 804 enables both direct and continuous connections between the I/O port and ADC circuits as shown in Figure 10, and indirect and periodic connections as shown in Figure 11. Accordingly, for the reasons discussed above, we find the connection limitation has its plain and ordinary meaning, which includes enabling both a direct and continuous connection of the I/O port to the plurality of ADCs and an indirect and periodic connection.” slip op. at 8

  • Novelty / Anticipation (§102) › Anticipation standard (single reference, every element)UnpatentableNot shown unpatentableMixed

    “We agree with Patent Owner. First, as discussed above, claims 12 and 18 are directed to the embodiment of Figure 10 of the ’071 patent, while claims 13 and 19 are directed to the embodiment of Figure 11. The Specification makes this clear by using language similar to that in claims 12 and 18 to describe the Figure 10 embodiment, and using language similar to that in claims 13 and 19 to describe the Figure 11 embodiment. For example, the Specification contrasts “coupling the analog input signal to each analog-to-digital converter circuit of the plurality of analog-to-digital converter circuits” (the same language used in claim 18) with the “alternative[]” embodiment of “periodically coupling a sample of the analog input signal to an analog-to-digital converter circuit of the plurality of analog-to-digital converter circuits” (the same language used in claim 19). Ex. 1001, 2:50–59. Similarly, the Specification contrasts “rout[ing] the analog input signal to each of the ADC circuits 602 of a group of ADC circuits” (similar to the language of claim 12) as shown in Figure 10 with input signal to a selected ADC circuit 606” (similar to the language of claim 13) as shown in Figure 11. Id. at 10:56–66. Based on these disclosures, we find that one of ordinary skill in the art would have understood the language of claims 12 and 18 to require routing the analog input signal received at the input/output port to each analog-to-digital converter without the use of a sampler, as shown in the Figure 10 embodiment. The use of a sampler is covered by claims 13 and 19, which cover the alternative Figure 11 embodiment.” slip op. at 26

  • Obviousness (§103) › Graham factors (scope of art, differences, level of skill)Not reached

    “E. Obviousness over Iwata and Hsueh Petitioner argues claim 2, which depends from claim 1, would have been obvious over the combination of Iwata and Hsueh. See Pet. 100–102. Patent Owner disagrees. See PO Resp. 53. As discussed in § II.C.4, supra, Petitioner has demonstrated by a preponderance of evidence that claim 2 is anticipated by Xia. Therefore, we need not consider whether Petitioner has also demonstrated that claim 2 would have been obvious over the combination of Iwata and Hsueh. See Beloit, 742 F.2d at 1423.” slip op. at 36

  Patent outcomesUS 8,548,071 mixed
  Claim construction§ 102 anticipation§ 103 obviousnesscites Phillips
  Patents in suitUS 8,548,071
• Qualcomm Inc. v. Monterey Research, LLCSome claims unpatentable
  PTAB · Mar 7, 2022 · IPR2020-01493 · APJ Jason W Melvin · IPR · Final written decision

  Claims 1–3, 8–10, and 15–17 are unpatentable over PIC16C7X anticipation or obviousness grounds; claims 7 and 14 were not shown unpatentable.

  RulingsFinal written decision

  • Skill levelSkill level petitioner adoptedDecided for petitioner

    “II. ANALYSIS A. LEVEL OF ORDINARY SKILL IN THE ART Petitioner proposes that a person of ordinary skill “would have had at least a bachelor’s degree in electrical or computer engineering, or a similar field with at least two years of experience in digital circuit and computer design, or a person with a master’s degree in electrical or computer engineering, or a similar field with a specialization in digital circuit and computer design.” Pet. 7 (citing Ex. 1010 ¶ 32). Patent Owner adopts that definition of a person of ordinary skill. PO Resp. 10. We adopt Petitioner’s proposed level of ordinary skill as it appears to be consistent with the level of skill reflected by the specification and in the asserted prior-art references.” slip op. at 5

  • Claim Construction › Intrinsic evidence (Phillips canons) › Plain and ordinary meaning to a POSITATerm construed board ownDecided for patent owner

    “construction. We read the plain language of a “programmable digital circuit block” as using “block” to suggest circuitry considered as a unit. Ex. 1001, 8:35–39. While a “block” of circuity could apply to a logical block, as under Petitioner’s view, the specification counsels in favor of considering the block as a physical structure. The specification describes configuration of “programmable digital circuit blocks . . . by changing the contents of a few registers therein,” suggesting that a block’s configuration registers are located physically within the block. Ex. 1001, 2:4–7 (emphasis added). Further, it describes how certain design approaches can “minimize the size of the programmable digital circuit block.” Id. at 2:9–13; accord id. at 4:15–16 (“[T]he programmable digital circuit block 100 is highly efficient in terms of die area.”), 4:26–34 (describing an embodiment with limited functionality “to further reduce the size of the programmable digital circuit block 100”). By referencing size, the specification directly implicates that a block is a physical circuit unit.” slip op. at 21

  • Novelty / Anticipation (§102) › Anticipation standard (single reference, every element)UnpatentableNot shown unpatentableMixed

    “Patent Owner argues that “[b]ecause a BSF after a power-on-reset cannot configure PWM mode,” the CCP is not “‘configurable to perform any one of’ capture, compare, or PWM mode” with a single register write operation. PO Resp. 46 (emphasis omitted). We do not agree, because nothing in the claim language requires the same instruction be used to configure the claimed programmable digital circuit block. Rather, it requires that only one operation be used to select the circuit block’s function from at least two possible functions. Because the BSF instruction uses a single write operation to set a bit in the CCPxCON register that can select either the capture or compare function, the claim language is satisfied. Moreover, even if Petitioner had to show that the CCP module must be configurable to function in any of the three modes with a single operation, Petitioner has done so. That the PWM mode is selected using a different instruction (COMF) than the capture or compare modes (BSF) does not take PIC16’s disclosures outside the challenged claims.” slip op. at 17

  • Obviousness (§103) › Objective indicia / secondary considerations › Long-felt need / failure of othersObjective indicia no nexusDecided for petitioner

    “to support the patentability of claims 2, 9, and 16. Specifically, Patent Owner argues that these claims are patentable over the asserted art because the ’407 patent’s claimed invention “solved a long-felt need . . . for a configurable computer architecture without the programming overhead and inefficiency of an FPGA.” PO Resp. 80–83. Patent Owner asserts benefits of the ’407 patent’s approach, citing exclusively to the specification.7 Id. Patent Owner then concludes that “[t]hese benefits, which were not provided in the prior art, support the nonobviousness of the claimed invention.” Id. at 83 (citing Ex. 2008 ¶ 198 (Patent Owner’s expert, repeating the same statement without additional support)). As discussed above, we agree with Petitioner that PIC16 discloses configuration of a programmable digital circuit block using a single register write operation. See supra at 6–19. PIC16 therefore solved the need that Patent Owner asserts, prior to invention of the ’407 patent.8 7 Patent Owner’s expert repeats Patent Owner’s claims, but provides no additional support. Ex. 2008 ¶¶ 194–197. 8 Even if we had not concluded that Patent Owner’s asserted need was already met before the challenged patent, Patent Owner has not identified objective evidence to support its view. Citations to the challenged patent’s specification do not offer a reliable basis on which to conclude that the claims were nonobvious, and Patent Owner’s declarant provides no additional evidence to support his statements. See Ex. 2008 ¶¶ 194–197; 37 C.F.R. § 42.65(a) (“Expert testimony that does not disclose the underlying facts or data on which the opinion is based is entitled to little or no weight.”). We have considered Patent Owner’s assertions regarding objective indicia of nonobviousness, together with Petitioner’s submissions regarding PIC16 and AN594, and conclude that the subject matter of claims 2, 9, and 16 would have been obvious over PIC16 and AN594 for the reasons given by Petitioner.” slip op. at 24

  Patent outcomesUS 6,765,407 mixed
  Claim construction§ 102 anticipation§ 103 obviousness
  Patents in suitUS 6,765,407
• Qualcomm Incorporated / Advanced Micro Devices, Inc. et al. v. Monterey Research, LLCAll claims unpatentable
  PTAB · Mar 4, 2022 · IPR2021-00776 · APJ John F Horvath · IPR · Final written decision

  Qualcomm proved claims 7–32 and 53–61 unpatentable; AMD and STM proved claims 7, 9, 11, 13–15, 17, 19–21, 24–32 and 53–61 unpatentable, principally over Oh-based combinations.

  RulingsFinal written decision

  • PTAB / AIA Trials › §315(e) estoppelEstoppel appliesDecided for patent owner

    “(“AMD”) and STMicroelectronics, Inc. (“STM”) were joined as parties to this proceeding. See Papers 22, 25. Moreover, in Advanced Micro Devices, Inc. v. Monterey Research, LLC, IPR2020-00990, Paper 45 (PTAB, Nov. 23, 2021), we determined AMD and STM showed by a preponderance of evidence that claims 8, 10, 12, 16, 18, 22, and 23 of the ’805 patent are unpatentable. Thus, AMD and STM are estopped from challenging the patentability of those claims in this proceeding. See 35 U.S.C. § 315(e)(1) (2018). Nonetheless, to challenge the patentability of claims 9, 11, 13–15, 17, 19–21, and 24–26, AMD and STM must demonstrate in this proceeding how the prior art maps to the limitations of claims 8, 10, 12, 16, 18, 22, and 23, from which these claims depend. Unless noted otherwise, we collectively refer to Qualcomm, AMD, and STM as “Petitioner.”” slip op. at 2

  • Skill levelSkill level petitioner adoptedDecided for petitioner

    “of the invention as someone that would have had “a bachelor’s degree in electrical engineering, computer engineering, applied physics, or a related field, and at least two years of experience in design, development, and/or testing of memory circuits, related hardware design, or the equivalent.” Pet. 12 (citing Ex. 1019 ¶¶ 50–53). In our Institution Decision, we adopted this description as our own. See Dec. Inst. 15–16. Neither party disputes that preliminary finding, which we maintain for purposes of this decision. See PO Resp. 14; Pet. Reply 1–29.” slip op. at 9

  • Claim Construction › Intrinsic evidence (Phillips canons) › Prosecution history disclaimer / disavowalDisclaimer not foundDecided for petitioner

    “meaning, that meaning may not apply “when a patent applicant surrender[s] claim scope during prosecution.” Elbex Video, Ltd. v. Sensormatic Electronics Corp., 508 F.3d 1366, 1371 (Fed. Cir. 2007). The doctrine of prosecution history disclaimer ensures that “[a] patentee may not state during prosecution that the claims do not cover a particular device and then change position and later sue a party who makes that same device for infringement.” Springs Window Fashions LP v. Novo Industries, L.P., 323 F.3d 989, 995–96 (Fed. Cir. 2003). Importantly, however, this doctrine does not apply when “the alleged disavowal is ambiguous” to one of ordinary skill in the art. Omega Eng’g Inc. v. Raytek Corp., 334 F.3d 1314, 1324 (Fed. Cir. 2003). This can happen, for example, when the patentee makes a statement during prosecution that is clearly erroneous. See Biotec” slip op. at 12

  • Claim Construction › Threshold & procedure › Whether a term needs construction (O2 Micro)Term construed board ownDecided for patent owner

    “local interconnects are short conductors that “connect[] features within a circuit” rather than “much longer metal conductors used for global connections.” Ex. 1001, 11:18–21. The Specification describes a local interconnect layer as a deposited layer of conducting material that is “patterned and etched” and “a distinct process layer that exclusively performs . . . short [inter] connections.” Id. at 11:22–23, 12:39–49 (emphasis added). Thus, a polysilicon layer that “provide[s] local interconnect” functions and also “provid[es] transistor gate[]” functions is not a local interconnect layer because it does not exclusively perform the interconnect function. Id. at 11:23–27. Likewise, a dielectric layer containing vias connecting structures in layers above and below it is not a local interconnect layer because it is not a deposited layer of conducting material. Id. at 8:52–64, 13:19–22 (disclosing forming “contacts” rather than “interconnects” in a deposited dielectric material layer). Given these disclosures, we construe a “single local interconnect layer” to mean “one conductive layer containing non-global interconnects, including interconnects for bitlines and a global wordline, that exclusively performs the function of connecting features within a circuit.” We disagree with Patent Owner’s contention that the Specification or prosecution history require a different construction. Although the Specification discloses an interconnect layer, a first metal layer containing bitlines, and a second metal layer containing a wordline, it does not disclose how the bitlines and wordline are laid out with respect to the interconnects in the interconnect layer. Id. at 13:19–32. Thus, although Figure 3 shows bitline signals can be routed horizontally and a global wordline signal can be routed vertically, neither the Specification nor claims require such routing.” slip op. at 19

  Patent outcomesUS 6,534,805 unpatentable
  Claim construction§ 103 obviousnesscites Phillips · KSR
  Patents in suitUS 6,534,805

Holdings, summaries, rulings, issues, outcomes, winners and claim constructions shown for a decision were generated by a large language model reading the opinion. They are a guide to the decision, not the decision. Confirm every one against the court's own text before relying on it. Outcomes read from the patent owner’s side. Party names are extracted from the decision and are missing on about 900 short Director denials and scans, which carry the trial number instead.