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  • PTAB · Apr 12, 2016 · IPR2016-00018 · APJ Peter P Chen · IPR · Institution

    The Board denied institution because Arista did not show a reasonable likelihood that claims 1, 2, 6–9, 12, 13, and 17–20 were unpatentable over Chau or Chau and Wils.

    RulingsInstitution decision
    • PTAB / AIA Trials › Institution threshold (reasonable likelihood / more likely than not)Institution denied meritsInstitution denied

      “review of claims 1, 2, 6–9, 12, 13, and 17–20 of U.S. Patent No. 8,051,211 B2 (Ex. 1001, “the ’211 patent”). Paper 2 (“Pet.”). Patent Owner, Cisco Systems, Inc., filed a Preliminary Response. Paper 7 (“Prelim. Resp.”). Institution of an inter partes review is authorized by statute when “the information presented in the petition . . . and any response . . . shows that there is a reasonable likelihood that the petitioner would prevail with respect to at least 1 of the claims challenged in the petition.” 35 U.S.C. § 314(a); see 37 C.F.R. § 42.108. Upon consideration of the Petition and the Preliminary Response, we are not persuaded Petitioner has demonstrated a reasonable likelihood that it would prevail in establishing the unpatentability of claims 1, 2, 6–9, 12, 13, and 17–20 of the ’211 patent. Accordingly, we do not institute an inter partes review.” slip op. at 2

    • BurdenNot shown unpatentable

      “Petitioner’s only apparent contention for Chau’s disclosure that the first and second LANs are both usable for simultaneous transmission “subsequent to” the aggregation of LANs, is that “the simultaneous transmission occurs as a result of the grouping of the first LAN (channel C2) and second LAN (channel C1).” Pet. 19–20, citing Ex. 1014 ¶ 54. The Lin declaration is similarly worded, and like the Petition, is silent as to whether Chau’s alleged simultaneous transmission occurs “subsequent to,” i.e., after the aggregation of LANs. Petitioner’s argument of simultaneous transmission occurring “as a result of” alleged aggregation of LANs is unavailing, because “subsequent to” means, “after,” not “as a result of.” In fact, in the related ’975 IPR, we expressly rejected the Patent Owner’s proposed construction of “as a result of” for “subsequent to.” See Section II.A. Neither the Petition nor the Lin declaration (Ex. 1014) cite any evidence of simultaneous transmission occurring “after” aggregation of LANs in Chau. Accordingly, we are not persuaded that Petitioner’s showing demonstrates a reasonable likelihood that it would prevail as to claim 1 being anticipated by Chau.” slip op. at 11

    • Claim Construction › Intrinsic evidence (Phillips canons) › Plain and ordinary meaning to a POSITAPlain and ordinary meaningDecided for patent owner

      “In addition, as we determined in the ’975 IPR, for purposes of this decision, we determine that the broadest reasonable construction of “subsequent to” is its ordinary and customary meaning, namely, “after.” See Case IPR2015-00975, slip op. at 7–8 (PTAB Oct. 6, 2015) (declining to adopt Patent Owner’s proposed construction of “as a result of” for “subsequent to”).” slip op. at 7

    • Novelty / Anticipation (§102) › Anticipation standard (single reference, every element)Not shown unpatentableNot shown unpatentable

      “Petitioner’s only apparent contention for Chau’s disclosure that the first and second LANs are both usable for simultaneous transmission “subsequent to” the aggregation of LANs, is that “the simultaneous transmission occurs as a result of the grouping of the first LAN (channel C2) and second LAN (channel C1).” Pet. 19–20, citing Ex. 1014 ¶ 54. The Lin declaration is similarly worded, and like the Petition, is silent as to whether Chau’s alleged simultaneous transmission occurs “subsequent to,” i.e., after the aggregation of LANs. Petitioner’s argument of simultaneous transmission occurring “as a result of” alleged aggregation of LANs is unavailing, because “subsequent to” means, “after,” not “as a result of.” In fact, in the related ’975 IPR, we expressly rejected the Patent Owner’s proposed construction of “as a result of” for “subsequent to.” See Section II.A. Neither the Petition nor the Lin declaration (Ex. 1014) cite any evidence of simultaneous transmission occurring “after” aggregation of LANs in Chau. Accordingly, we are not persuaded that Petitioner’s showing demonstrates a reasonable likelihood that it would prevail as to claim 1 being anticipated by Chau.” slip op. at 11

    Claim construction§ 102 anticipation§ 103 obviousness
    Patents in suitUS 8,051,211
  • PTAB · Mar 9, 2016 · IPR2014-01372 · APJ Linda M Gaudette · IPR · Final written decision

    The Board held claims 1–4, 14–20, 27, and 29 not unpatentable because Averbuj did not disclose a control module configured to generate the claimed address signals.

    RulingsFinal written decision
    • Skill levelSkill level petitioner adoptedDecided for petitioner

      “Based on a comparison of Dr. Bagherzadeh’s and Dr. Sechen’s declarations (Exs. 1009, 2019), we find Dr. Bagherzadeh has a broader range of educational and work experience, and, therefore, accord greater weight to his opinion as to the level of ordinary skill in the art. Dr. Bagherzadeh’s opinion is consistent with our finding as to the level of ordinary skill in the art in our Final Written Decision in IPR-970. We, therefore, adopt our finding in IPR-970 as to the level of ordinary skill in the art: [A] person of ordinary skill in the art at the time of the ’434 patent would have a Bachelor’s degree in electrical engineering, computer engineering, or in a related field and at least one year of work experience relating to memory systems, and would be familiar with the design of memory devices, memory modules, and BIST. IPR-970 FWD, 10–11 (noting that our finding was “based on our review of the ’434 patent and the types of problems and solutions described in the ’434 patent and cited prior art”).” slip op. at 10

    • Expert testimonyPetitioner expert discountedDecided for patent owner

      “We are not persuaded by Dr. Bagherzadeh’s testimony because it is devoid of specific facts and analysis as to what led him to conclude that a person of ordinary skill in the art would interpret the claim term “generate” in the manner Petitioner proposes. See id. Dr. Bagherzadeh does not explain how the IEEE definition supports an interpretation of generate as “cause or initiate transmission,” terms that do not appear in the IEEE definition. See id. Nor does Dr. Bagherzadeh identify other extrinsic evidence which he believes to be consistent with an interpretation of “generate” as meaning “cause or initiate transmission.” See id. Likewise, Dr. Bagherzadeh has not explained why he believes the ’434 patent “describe[s] generating as initiating or transmitting” (Ex. 1009 ¶ 28), as these terms do not appear in the cited portions of the ’434 patent. See Ex. 1008, 6:3–5, 10:67–11:2, 6:14–17. Accordingly, Dr. Bagherzadeh’s testimony does not persuade us to accept Petitioner’s interpretation of “generate” as meaning “cause.”” slip op. at 15

    • Claim Construction › Intrinsic evidence (Phillips canons) › Plain and ordinary meaning to a POSITATerm construed patent owner constructionDecided for patent owner

      “supports a finding that a customary meaning of “generate” to one of ordinary skill in the art is “cause.”1 We, therefore, determine the broadest reasonable 1 Petitioner relies on Webster’s II, for a definition of “cause.” See Reply 4, 6–8 (citing Ex. 1032, 3). Having determined the broadest reasonable interpretation of “generate” does not encompass “cause,” we do not find this evidence relevant to our claim construction analysis. construction of “generate” is “produce” for the reasons stated above and in our Final Written Decision in IPR-970. We adopt and incorporate by reference our analysis and construction of the term “generate” in our Final Written Decision in IPR-970 (IPR-970 FWD, 24–33).” slip op. at 16

    • Novelty / Anticipation (§102) › Anticipation standard (single reference, every element)Not shown unpatentableNot shown unpatentable

      “Moreover, the evidence in this proceeding fails to support a finding that Averbuj’s BIST controller 4 is configured to generate address signals for testing the memory devices in the manner claimed. In Averbuj, the algorithms (i.e., CMD_DATA containing OP CODE such as SET ADDRESS (see Ex. 1011, 4:4–12, 5:19–21, Table 1)) communicated to sequencers 8 are either received by user interface 22 via external input (id. at 5:41–43) or generated by another component (i.e., a component that is not part of BIST controller 4 circuitry) and stored in algorithm memory 20 (see Ex. 2012, 30:23–24, 41:1–4, 54:21–22, 55:6–25, 55:20–56:9 (wherein Dr. Bagherzadeh testifies that OP CODE residing in the algorithm memory of BIST controller 4 are generated by hand or by a tool, e.g., a compiler, and that “99 percent of the designs or chips do not have a compiler on-board”)). Multiplexer 24 selects one of the algorithms (i.e., CMD_DATA) and BIST controller 4 provides to sequencers 8 the same CMD_DATA (e.g., address signals) without transformation or modification. See Ex. 1011, 4:4–12, 5:16–21; Ex. 2012, 54:8–13 (“Averbuj Figure 2, without consideration of any other disclosure in Averbuj, illustrates that a multiplexer selects an input from the algorithm memory and the output [] reflect[s] what’s in the input, based on the selection.”). Based on our interpretation of the terms “configured to” and “generate,” as discussed above, the claim recitation “a control module configured to generate address . . . signals for testing the memory devices” (claims 1, 20, and 29) does not read on Averbuj’s BIST controller 4, because the SET ADDRESS signal output by BIST controller 4 is produced by a component external to BIST controller 4, and merely selected by multiplexer 24 and provided to sequencers 8 without transformation or modification by BIST controller 4. In sum, after considering the parties’ arguments and evidence, we determine Petitioner has not shown, by a preponderance of the evidence, that Averbuj discloses “a control module configured to generate address . . . signals for testing the memory devices” as recited in independent claims 1, 20, and 29. Petitioner does not correct this deficiency in its challenges as to dependent claims 2–4, 14–19, and 27. See Pet. 32–39; 35 U.S.C. § 112, ¶ 4 (“A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers.”). Because Petitioner has not identified in Averbuj a teaching of each and every limitation recited in claims 1–4, 14–20, 27, and 29, Petitioner has not met its burden to show these claims are unpatentable under 35 U.S.C. § 102(b) as anticipated by Averbuj.” slip op. at 30

    Patent outcomesUS 8,001,434 not shown unpatentable
    Claim construction§ 102 anticipation
    Patents in suitUS 8,001,434
  • PTAB · Feb 29, 2016 · IPR2015-00973 · APJ Bryan F Moore · IPR · Rehearing

    The Board denied rehearing and again denied institution on all challenged claims because the petition did not show a reasonable likelihood that Hendel disclosed the claimed access result.

    RulingsRehearing decision
    • RehearingRehearing, deniedDenied

      “the Board reviews the decision for an abuse of discretion. 37 C.F.R. § 42.71(c). An abuse of discretion may arise if a decision is based on an erroneous interpretation of law, if a factual finding is not supported by substantial evidence, or if an unreasonable judgment is made in weighing relevant factors. Star Fruits S.N.C. v. U.S., 393 F.3d 1277, 1281 (Fed. Cir. 2005); Arnold P’ship v. Dudas, 362 F.3d 1338, 1340 (Fed. Cir. 2004); In re Gartside, 203 F.3d 1305, 1315–16 (Fed. Cir. 2000). The party requesting rehearing has the burden of showing that the decision should be modified, and “[t]he request must specifically identify all matters the party believes the Board misapprehended or overlooked.” 37 C.F.R. § 42.71(d).” slip op. at 2

    • PTAB / AIA Trials › Institution threshold (reasonable likelihood / more likely than not)Institution denied meritsInstitution denied

      “being forwarded (restriction) or that an output port is selected and altered. Rather, these citations generally state that priority can be given to certain packets and quality of service can be applied to layer 2 routing. Thus, we are not persuaded that Petitioner’s citation to quality of service in general discloses “generating an access result in response to said at least one selected match.”” slip op. at 7

    • Claim Construction › Intrinsic evidence (Phillips canons) › Plain and ordinary meaning to a POSITATerm construed board ownOther

      “rehearing, we determine that the phrase “modifications on the intended destination address to which a packet is to be transmitted” introduces uncertainly into the construction.4 The construction in the Decision appears to conflate the “destination” of a packet with the output interface to which a packet is directed. The Specification does not describe, however, modifying the “destination” of the packet; the only “modification” on how the packet is routed specifically described in the Specification is when “the access control element 120 . . . [alters] the output interface, which was selected by the routing element 110, to another selected output interface.” Ex. 1001, 6:13– 4 Petitioner does not seek rehearing of the claim construction (Reh’g Req. 4, n. 1) but our analysis requires that we revisit the claim construction determination from the Decision. 16; Reh’g Req. 4–5. Thus, we modify our construction of “access control” to mean only restrictions on the transmission of a packet or alteration of a selected output interface for the packet.” slip op. at 4

    • Expert testimonyPetitioner expert discountedDecided for patent owner

      “Additionally, Petitioner cites to its Declarant Dr. Chao. Reh’g Req. 6 (citing Ex. 1003 ¶ 31). Petitioner’s Declarant states without citation that “a switch may modify the forwarding decision to account for network policies such as quality of service determinations. That is, a packet may be destined for a certain MAC address and port on the switch, but the switch may determine that the packet can be transmitted more reliably through another port, and so it will change the destination port for that packet.” Ex. 1003 ¶ 31. Petitioner’s Declarant’s testimony is conclusory and unsupported by evidence, and, therefore, we give that testimony no weight.” slip op. at 7

    Claim construction
    Patents in suitUS 6,377,577
  • PTAB · Feb 22, 2016 · IPR2014-01448 · APJ Debra K Stephens · IPR · Final written decision

    Claims 1 and 7 are unpatentable as obvious over He and Korodi; the Board did not reach the Gustafsson and He ground.

    RulingsFinal written decision
    • Claim Construction › Intrinsic evidence (Phillips canons) › Plain and ordinary meaning to a POSITAPlain and ordinary meaningDecided for petitioner

      “its claims, but instead, recited only “emits.” Patent Owner has not proffered any evidence or argument as to why “emits and dies” used in the ’279 Patent Specification, would have been abbreviated to “emits” in recitation of the claims. Nor is the term “emits” defined explicitly in the ’279 Patent Specification. Thus, we begin with the assumption that the term “emits” does not include “and dies,” as that comports with the plain and ordinary meaning of the word “emits” Thus, taking the plain and ordinary meaning at the time of the invention, we interpret “emits light in sequence” as “throws off or gives off or out light in a continuous or connected series” and interpret “emits in sequence” as “throws off or gives off or out, in a continuous or connected series” (see e.g., Merriam-Webster’s Collegiate Dictionary 377, 1065 (10th ed. 2000)). Patent Owner has not proffered sufficient evidence or argument that “emits light in sequence” and “emits in sequence” should be read more narrowly than the plain and ordinary meaning as suggested by Patent Owner. Specifically, Patent Owner’s assertion that the Specification supports the proposed interpretation of “emits light in sequence” as “emits and dies light in sequence” is misplaced. The Specification of the ’279 Patent does not explicitly define “emits light in sequence” as “emits and dies light in sequence.” Nor is any explicit definition provided for “emits light in sequence” or “emits in sequence.” Patent Owner would have us import limitations disclosed in several of the embodiments, including Embodiment 1, to interpret “emits” as “emits and dies light in sequence” or “emits and” slip op. at 9

    • Claim Construction › Intrinsic evidence (Phillips canons) › Prosecution history disclaimer / disavowalDisclaimer not foundDecided for petitioner

      “Patent Owner additionally asserts “Patent Owner specifically disclaimed emission of light over the full length of the cable, but rather limited the patent to segment by segment illumination along the length of the cable,” thereby limiting the phrase “emits light in sequence” (PO Resp. 43). Patent Owner identified pages 9–10 of the Response to Office Action filed September 18, 2009 (Ex. 1002, 25–26), as providing this disclaimer (PO Resp. 48–49). However, we agree with Petitioner that the statements in the Response to Office Action do not disclaim subject matter, nor do these statements provide an explicit definition of “emits,” “emits light in sequence, and “emits in sequence.” Indeed, the discussion, limited to claim 7, discusses the object of the invention and distinguishes the invention as recited in claim 7 over the cited prior art, Baumberg et al. (US 5,869,930) (Resp. to OA 9–10). This discussion does not qualify as “clear and unmistakable” disavowing statements as required to meet the “demanding standard for finding a disclaimer.” Avid Tech., Inc. v. Harmonic, Inc., No. 2015-1246, 2016 WL 363410, at *4 (Fed. Cir. Jan. 29, 2016). We, therefore, determine the term “emits light in sequence” and “emits in sequence” used in the claims, should not be interpreted as “emits and dies light of each electroluminescent cored bar or cord in succession, one after the other,” but instead, should be interpreted giving the terms their ordinary and customary meaning as understood by an ordinarily skilled artisan at the time of the invention, in light of the Specification.” slip op. at 10

    • Obviousness (§103) › Analogous artAnalogous artDecided for petitioner

      “(PO Resp. 37–40). A reference qualifies as prior art for an obviousness determination under § 103 only when it is analogous to the claimed invention. Innovention Toys, LLC, v. MGA Entm’t, Inc., 637 F.3d 1314, 1322 (Fed. Cir. 2011); In re Bigio, 381 F.3d 1320, 1325 (Fed. Cir. 2004); In re Clay, 966 F.2d 656, 658 (Fed. Cir. 1992). “Two separate tests define the scope of analogous prior art: (1) whether the art is from the same field of endeavor, regardless of the problem addressed and, (2) if the reference is not within the field of the inventor’s endeavor, whether the reference still is reasonably pertinent to the particular problem with which the inventor is involved.” Bigio, 381 F.3d at 1325 (citations omitted).” slip op. at 18

    • Obviousness (§103) › Motivation to combine / reasonable expectation of successMotivation foundDecided for petitioner

      “Nonetheless, we find Petitioner has articulated reasoning with a rational underpinning as to why an ordinarily skilled artisan would have been motivated to combine the teachings (Pet. 34–36; Ex. 1008 ¶¶ 98–104). Specifically, Petitioner contends an ordinarily skilled artisan would have been motivated to combine the teachings of He and Korodi because “such a modification is both a predictable variation and an incremental improvement” (Pet. 35). According to Petitioner, an ordinarily skilled artisan would have found it obvious and “straight-forward” to replace the aluminum core wire in He with a power cord to create an improved illuminated cable using electroluminescent wires that light in sequence (id. at 36). Petitioner further asserts combining the teachings would “involve the merger of familiar elements according to their established functions, known methods, and predictable results” (id.). We agree with the Petitioner that an ordinarily skilled artisan would have been motivated to replace the core wire at the center of He’s cable with a power cord as taught by Korodi to create an improved illuminated cable. We find the combination of He and Korodi unites old elements with no change in their respective functions. Indeed, we agree that combining the teachings would be a merger of familiar elements, Korodi’s power cord and He’s electroluminescent cable, that perform their ordinary functions to predictably result in the recited cable which includes a main power cord and a plurality of electroluminescent cords which emit light in sequence when the main cord and the driver are live. To be nonobvious, an improvement must be “more than the predictable use of prior art elements according to their established functions.” KSR Int’l Co. v. Teleflex, Inc., 550 U.S. 398, 417 (2007). Additionally, as further support, we credit Petitioner’s Declarant’s, Dr. Mark Horenstein’s, testimony that replacing the aluminum core wire in He for the power cord in Korodi would have been a merger of familiar elements according to their established functions, known methods, and predictable results that an ordinarily skilled artisan would have found obvious (Ex. 1008 ¶¶ 99, 102, 103).” slip op. at 20

    Patent outcomesUS 7,671,279 unpatentable
    Claim construction§ 103 obviousnesscites KSR
    Patents in suitUS 7,671,279
  • PTAB · Feb 9, 2016 · CBM2015-00171 · APJ Michael W Kim · CBM · Institution

    The Board denied institution because Petitioner did not show that any existing claim qualified as a covered business method patent under AIA § 18(d)(1).

    RulingsInstitution decision
    • PTAB / AIA Trials › Institution threshold (reasonable likelihood / more likely than not)Institution denied meritsInstitution denied

      “that the patent for which review is sought is a covered business method patent.” The AIA defines “covered business method patent” as “a patent that claims a method or corresponding apparatus for performing data processing or other operations used in the practice, administration, or management of a financial product or service, except that the term does not include patents for technological inventions.” AIA § 18(d)(1); see 37 C.F.R. § 42.301(a).” slip op. at 6

    • Adverse judgmentAdverse judgmentOther

      “disclaimer under 37 C.F.R. § 1.321(a) of claims 1–10. Prelim. Resp. 13 (citing Ex. 2002). Thus, the question is whether we should consider now-statutorily disclaimed claims 1–10 in determining whether or not the ’177 patent is a covered business method patent for the purposes of instituting a covered business method patent review. We determine that we should not. 37 C.F.R. § 1.321(a) is the rule promulgated by the Office for creating a procedure for a patentee to avail itself of the provisions of 35 U.S.C. § 253. See Manual of Patent Examining Procedure § 1490. Our reviewing court has held that a patent with a statutory disclaimer is to be treated as though the disclaimed claims never existed. See Guinn v. Kopf, 96 F.3d 1419, 1422 (Fed. Cir. 1996) (“A statutory disclaimer under 35 U.S.C. § 253 has the effect of canceling the claims from the patent and the patent is viewed as though the disclaimed claims had never existed in the patent.”). Accordingly, for the purposes of whether or not to institute a covered business method patent review, we treat claims 1–10 as never having existed. See Google Inc. v. SimpleAir, Inc., CBM2015-00019 slip op. at 14– 15 (PTAB May 19, 2014) (Paper 11); but see J.P. Morgan Chase v. Intellectual Ventures, Case CBM2014-00157 slip op. at 12–15 (PTAB Jan. 12, 2016) (Paper 40) (although the panel states that “petitioner’s standing to file a petition for covered business method patent review is evaluated based on the time the petition was filed,” in this proceeding, Patent Owner” slip op. at 7

    • Claim Construction › Threshold & procedure › Whether a term needs construction (O2 Micro)Term construed petitioner constructionDecided for petitioner

      “unexpired patent are interpreted according to their broadest reasonable construction in light of the specification of the patent in which they appear. 37 C.F.R. § 42.300(b); Versata Dev. Grp., Inc. v. SAP Am., Inc., 793 F.3d 1306, 1328 (2015) (affirming use of the broadest reasonable construction standard in a covered business method patent review). Under that standard, and absent any special definitions, we give claim terms their ordinary and customary meaning, as would be understood by one of ordinary skill in the art at the time of the invention. In re Translogic Tech., Inc., 504 F.3d 1249, 1257 (Fed. Cir. 2007).” slip op. at 5

    Claim construction
    Patents in suitUS 7,516,177
  • PTAB · Jan 21, 2016 · IPR2014-01185 · APJ Peter P Chen · IPR · Final written decision

    Claims 1–10 and 17 are unpatentable: claims 1–3 and 5 as obvious over Schmidl and Arslan; claims 4 and 6–10 over those references and Kim; claim 17 over those references and Heiskala.

    RulingsFinal written decision
    • Claim Construction › Intrinsic evidence (Phillips canons) › Plain and ordinary meaning to a POSITATerm construed board ownDecided for petitioner

      “Our interpretation of the disputed term begins with the language of the claim. See Microsoft Corp. v. Proxyconn Inc., 789 F.3d 1292, 1299 (Fed. Cir. 2015). Claim 1 recites that pilot symbols are inserted “into data blocks.” We construe claim 1’s plain language using the plural form of “data blocks” to mean that pilot symbols may be inserted not only within a single data block, as Patent Owner contends, but also between one data block and another data block, as Petitioner contends. Claims should also be read in light of the specification and teachings in the underlying patent. Cuozzo, 793 F.3d at 1280; Microsoft, 789 F.3d at 11 1298. Here, the specification also uses the plural form of data blocks in explaining that “[t]ypically, pilot symbols may be inserted at any point in the data blocks.” Ex. 1001, 16:55–56, 7:28–29. There is no language in the specification disclaiming the insertion of pilot symbols between data blocks. We are persuaded that based on the claim’s usage of the plural “data blocks,” which is supported by the description in the specification, the broadest reasonable construction is “pilot/training symbol inserter configured to insert pilot symbols within, or between, one or more data blocks,” and accordingly, does not exclude the insertion of pilot symbols between two data blocks that are in a group of data blocks.” slip op. at 11

    • Skill levelSkill level board ownOther

      “We determine that an express definition of the level of ordinary skill is not required. The level of ordinary skill in the art can be reflected in the 13 cited prior art references. See Okajima v. Bourdeau, 261 F.3d 1350, 1355 (Fed. Cir. 2001) (“[T]he absence of specific findings on the level of skill in the art does not give rise to reversible error where the prior art itself reflects an appropriate level and a need for testimony is not shown.”) (internal quotations omitted); In re GPAC Inc., 57 F.3d 1573, 1579 (Fed. Cir. 1995). Therefore, we find the level of ordinary skill in the art to be reflected in the cited references.” slip op. at 13

    • Obviousness (§103) › Motivation to combine / reasonable expectation of successMotivation foundUnpatentable

      “that “both Schmidl and Arslan are directed at improving synchronization between a wireless transmitter and a wireless receiver, and disclose frame structures including information for the same.” Pet. 16. In particular, Schmidl discloses an encoder that inserts training symbols in the frequency domain, to form training symbols in the time domain. Pet. Reply 13, 17 (citing Ex. 1036 ¶ 21); see Ex. 1002, 2:7–17. Arslan discloses a frame structure in the time domain containing pilot symbols interspersed among data symbols. Pet. Reply 16–17 (citing Ex. 1036 ¶¶ 20, 22). Petitioner further states: [I]t would have been obvious to use pilot symbols as separate time domain symbols for tracking time variations to calibrate or synchronize the receiver to the transmitter by using time-domain pilot symbols in Schmidl’s system. . . [citing to Supplemental Declaration of Dr. Zygmunt Haas ¶ 22.] As discussed above, Schmidl discloses inserting symbols in the frequency domain for an OFDM system, for calibration and synchronization. See id. It would have been obvious to create those time-domain pilot symbols in the same manner as the time-domain training symbols are created in Schmidl’s encoder – that is, by inserting blocks of known pilot symbols in the frequency domain that would result in time-domain pilot symbols. See id. It would be obvious to a POSA that the same circuitry in Schmidl’s encoder 14 used to insert training symbols would be used to insert pilot symbols, resulting in the claimed “pilot/training symbol inserter configured to insert pilot symbols into data blocks.” See id. Pet. Reply 17–18; see Pet. 16, 29–30.” slip op. at 22

    Patent outcomesUS 7,269,127 unpatentable
    Claim construction§ 103 obviousnesscites KSR
    Patents in suitUS 7,269,127
  • Atoptech, Inc. v. Synopsys, Inc.All claims unpatentable
    PTAB · Jan 19, 2016 · IPR2014-01159 · APJ Peter P Chen · IPR · Final written decision

    Claims 5, 23, 24, and 27 are unpatentable as obvious; claim 31 was not shown anticipated, and claim 26 was not shown obvious.

    RulingsFinal written decision
    • Prior constructionPrior construction adoptedDecided for petitioner

      “In our Decision to Institute, we construed “place and route unit (PRU).” We determined that the broadest reasonable interpretation of that term is, “a section of the IC design created to represent the physical partitioning of the IC design.” Dec. to Inst., 10. Neither party disputes that construction in their post-institution filings.” slip op. at 10

    • Claim Construction › Intrinsic evidence (Phillips canons) › Lexicography (patentee as own lexicographer)Term construed patent owner constructionDecided for patent owner

      “in the underlying patent. In re Cuozzo, 793 F.3d at 1280; Microsoft Corporation v. Proxyconn Inc., 789 F.3d at 1298. Here, the specification expressly defines atomic blocks: Defining Atomic ("A") blocks (sometimes called units) – “A” blocks are the netlist blocks that will be physically partitioned to create place and route units (PRUs). "A" blocks may contain only standard cells or they may contain additional levels of hierarchy. For the purpose of partitioning the circuit design into PRUs, the "A" blocks are indivisible. Ex. 1001, 4:8–12. Consistent with the patentee’s express definition of atomic block, we determine the broadest reasonable interpretation of atomic block to be, “a netlist block that is indivisible for the purpose of physically partitioning the circuit design into place and route units (PRUs).”” slip op. at 11

    • Skill levelSkill level board ownDecided for petitioner

      “C. Level of Ordinary Skill in the Art Petitioner has not proposed a level of ordinary skill in the art. Patent Owner proposes that one of ordinary skill in the art would possess a “Bachelor of Science degree in Electrical Engineering, Computer Engineering, or a closely related field,” as well as “a minimum of one to two years of professional experience in the engineering development of integrated circuit technology.” Ex. 2004 (Declaration of Daniel Foty, Ph.D.), ¶ 15. At the oral hearing, Petitioner stated it had no dispute with Patent Owner’s proposal. Tr. 16:21–17:2. We determine that an express definition of the level of ordinary skill is not required. The level of ordinary skill in the art can be reflected in the cited prior art references. See Okajima v. Bourdeau, 261 F.3d 1350, 1355 (Fed. Cir. 2001) (“the absence of specific findings on the level of skill in the art does not give rise to reversible error where the prior art itself reflects an appropriate level and a need for testimony is not shown.”) (internal quotations omitted); In re GPAC Inc., 57 F.3d 1573, 1579 (Fed. Cir. 1995). Therefore, we find the level of ordinary skill in the art to be reflected in the cited references.” slip op. at 12

    • Expert testimonyPetitioner expert creditedDecided for petitioner

      “directed at efficient circuit design involving large and complex circuits, and determine that, as set forth in the VLSI textbook, FPGA is indeed a type of layout for physical design. We also credit the testimony of Dr. Ghiasi, who opines that: While Fields presents this logical approach to IC floorplanning in the context of FPGA design, one of ordinary skill as of September 2000 would have understood that the general teachings of Fields could be applied to the design of an ASIC chip as well as an FPGA chip and would have been motivated to apply the teaching of Fields to solve the problem of very large IC chip design. . . . One of ordinary skill in the field of EDA design would be familiar with IC design for both ASIC and FPGA formats and would rely on teachings in the context of FPGA chip design, especially in the front end of an EDA design flow, through floorplanning and partitioning of the physical design in addressing problems in ASIC chip design, and vice versa. Ex. 1009 ¶¶ 72–73. Even assuming arguendo the Board were to accept Patent Owner’s assertion that design of an FPGA is “completely different” from design of an integrated circuit, the Supreme Court’s decision in KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 417 (2007) stated, “[w]hen a work is available in one field of endeavor, design incentives and other market forces can prompt variations of it, either in the same field or a different one.” Thus, under KSR, such purportedly “different” teachings of Fields about FPGA design could be applicable to the physical design of an integrated circuit as described in the ’967 patent and in Su. We are persuaded by Petitioner’s evidence, including the VLSI textbook and the Ghiasi declaration, and find that one of ordinary skill in the art would have understood the applicability of Fields’ FPGA teachings to physical design of an integrated circuit as recited in claim 1 of the ’967 patent.” slip op. at 25

    Patent outcomesUS 6,567,967 unpatentable
    Claim construction§ 102 anticipation§ 103 obviousnesscites KSR
    Patents in suitUS 6,567,967
  • Atoptech, Inc. v. Synopsys, Inc.All claims unpatentable
    PTAB · Jan 19, 2016 · IPR2014-01145 · APJ Trenton A Ward · IPR · Final written decision

    Claims 1–4 and 7–11 are unpatentable as obvious over Belkhale alone and over Belkhale in combination with Tom.

    RulingsFinal written decision
    • Skill levelSkill level patent owner adoptedDecided for patent owner

      “view of the ’127 patent, a person of ordinary skill in the art would have a minimum of a Bachelor of Science degree in Electrical Engineering, Computer Engineering, or a closely related field and would have a minimum of one to two years of professional experience in the development and analysis of digital electronic circuits. Ex. 2004, Declaration of Dr. Martin G. Walker ¶ 22. Petitioner does not disagree with Dr. Walker’s opinion as to the proper level of ordinary skill in the art. Pet. Reply 17. Based on our review of the ’127 patent and the testimony of Patent Owner’s Declarant, we adopt Patent Owner’s definition of a person of ordinary skill in the art at the time of the claimed invention. Furthermore, as noted in the Decision on Institution, the applied prior art also reflects the appropriate level of skill at the time of the claimed invention. See Dec. on Inst. 23 (citing Okajima v. Bourdeau, 261 F.3d 1350, 1355 (Fed. Cir. 2001) (“the absence of specific findings on the level of skill in the art does not give rise to reversible error where the prior art itself reflects an appropriate level and a need for testimony is not shown.”) (internal quotations omitted); In re GPAC Inc., 57 F.3d 1573, 1579 (Fed. Cir. 1995)).” slip op. at 5

    • Claim Construction › Intrinsic evidence (Phillips canons) › Plain and ordinary meaning to a POSITATerm construed petitioner constructionDecided for petitioner

      “circuit under non-default timing constraints known as exceptions.” Ex. 1001, 1:8–11; see id. at Title, Abstract. The Specification adds “[e]xceptions are specified by the circuit designer as individual syntactic units called ‘exception statements’ which are comprised of a ‘timing alteration’ and a ‘path specification.’” Ex. 1001, 1:58–61. The timing alteration instructs the timing analyzer how to alter the default timing constraints for paths through the circuit to be analyzed which satisfy the path specification. Id. at 1:61–63. The Specification further states, “[t]he path specification consists of one or more ‘path specifiers,’ with each path specifier taking an ‘argument.’ In order for a path specification to be satisfied, each argument of each of its path specifiers must be satisfied.” Id. at 1:64–67. In view of the foregoing, we maintain the construction provided in the Decision on Institution (Dec. on Inst. 7) and construe the term “exception” as “non-default timing constraints.”” slip op. at 8

    • Claim Construction › Threshold & procedure › Whether a term needs construction (O2 Micro)Term construed board ownDecided for patent owner

      “Petitioner counters that Patent Owner’s arguments fail to provide any evidence that a “set” must include more than a single data item. Pet. Reply. 3. Petitioner argues that both the ’127 patent and Belkhale refer to a “null set,” which is a set having no data items. Id. (citing Ex. 1001, Fig. 9A, 9E; Ex. 1005 at 737). We agree with Petitioner that the term “table” does not require multiple data items and, likewise, that the term “timing table” does not require multiple delay values. Although the Specification discloses an exemplary “RF timing table” as having four RF values (Ex. 1001, 9:54–57), the claim language is broader and not restricted to a specific type of table or number of data items in the table. To require otherwise would improperly import a limitation from the Specification into the claim. See, e.g., SuperGuide Corp. v. DirecTV Enters., Inc., 358 F.3d 870, 875 (Fed. Cir. 2004) (“Though understanding the claim language may be aided by the explanations contained in the written description, it is important not to import into a claim limitations that are not a part of the claim.”). In view of the foregoing, we maintain the construction provided in the Decision on Institution (Dec. on Inst. 7) and determine the broadest reasonable interpretation of “timing table” is a “table having a timing value.”” slip op. at 9

    • Obviousness (§103) › Graham factors (scope of art, differences, level of skill)UnpatentableUnpatentable

      “We are persuaded that Belkhale’s false paths and false sub graphs teach or suggest the claimed “exception.” As Petitioner observes, Belkhale describes false paths as paths that are not logically realizable and must be detected and eliminated from the timing analysis. Pet. 13 (citing Ex. 1005, 736). Likewise, Belkhale explains that removing an entire false sub graph from timing consideration is advantageous because multiple paths may be simultaneously removed from consideration. See Pet. 13–14 (citing Ex. 1005, 736; Ex. 1007 ¶ 78). Accordingly, we are persuaded by Petitioner’s argument that Belkhale’s false path and false sub graph are each a non-default timing constraint (i.e., an exception) because they represent circuit pathways that are not logically realizable and must be eliminated from the timing analysis. Id. Second, we also are persuaded Petitioner has established sufficiently how Belkhale’s ordered pair vertices or Algorithm 1 disclose “marking certain points in a circuit description according to their being referenced by,” recited in claim 1, a false path or false sub graph. As Petitioner points out, Belkhale defines false paths in a multiplexer circuit with ordered pair vertices. Additionally, Petitioner separately equates Belkhale’s use of “three separate data structures” BG(v), EG(v), and IN(e) to associate points in the circuit description with the false sub graph. Pet. 21–22; see Pet. 16–18 (explaining Algorithm 1 in operation). We understand Petitioner’s latter argument to be that Belkhale’s timing graph “G” discloses a circuit description, the false sub graphs disclose exceptions, and the three data sets define vertices and edges according to a relationship to the false sub graphs.” slip op. at 13

    Patent outcomesUS 6,237,127 unpatentable
    Claim construction§ 103 obviousnesscites KSR · Graham
    Patents in suitUS 6,237,127
  • Atoptech, Inc. v. Synopsys, Inc.All claims unpatentable
    PTAB · Jan 19, 2016 · IPR2014-01150 · APJ Peter P Chen · IPR · Final written decision

    Claims 1, 4, 8, 9, 12, 16, 19–22 are unpatentable as obvious over Fields and Su; claims 32–36 are unpatentable as anticipated by Su.

    RulingsFinal written decision
    • Skill levelSkill level board ownDecided for patent owner

      “Owner proposes that one of ordinary skill in the art would possess a “Bachelor of Science degree in Electrical Engineering, Computer Engineering, or a closely related field,” as well as “a minimum of one to two years of professional experience in the engineering development of integrated circuit technology.” Ex. 2004 (Declaration of Daniel Foty, Ph.D.), ¶ 15. At the oral hearing, Petitioner stated it had no dispute with Patent Owner’s proposal. Tr. 16:21–17:2. We determine that an express definition of the level of ordinary skill is not required. The level of ordinary skill in the art can be reflected in the cited prior art references. See Okajima v. Bourdeau, 261 F.3d 1350, 1355 (Fed. Cir. 2001) (“the absence of specific findings on the level of skill in the art does not give rise to reversible error where the prior art itself reflects an appropriate level and a need for testimony is not shown.”) (internal quotations omitted); In re GPAC Inc., 57 F.3d 1573, 1579 (Fed. Cir. 1995). Therefore, we find the level of ordinary skill in the art to be reflected in the cited references.” slip op. at 12

    • Claim Construction › Intrinsic evidence (Phillips canons) › Lexicography (patentee as own lexicographer)Term construed patent owner constructionDecided for patent owner

      “in the underlying patent. In re Cuozzo, 793 F.3d at 1280; Microsoft Corporation v. Proxyconn Inc., 789 F.3d at 1298. Here, the specification expressly defines atomic blocks: Defining Atomic ("A") blocks (sometimes called units) – “A” blocks are the netlist blocks that will be physically partitioned to create place and route units (PRUs). "A" blocks may contain only standard cells or they may contain additional levels of hierarchy. For the purpose of partitioning the circuit design into PRUs, the "A" blocks are indivisible. Ex. 1001, 4:8–12. Consistent with the patentee’s express definition of atomic block, we determine the broadest reasonable interpretation of atomic block to be, “a netlist block that is indivisible for the purpose of physically partitioning the circuit design into place and route units (PRUs).”” slip op. at 10

    • Obviousness (§103) › Analogous artAnalogous artDecided for petitioner

      “We agree with Petitioner that the ’967 patent, Fields, and Su are all directed at efficient circuit design involving large and complex circuits, and determine that, as set forth in the VLSI textbook, FPGA is indeed a type of layout for physical design. We also credit the testimony of Dr. Ghiasi, who opines that: While Fields presents this logical approach to IC floorplanning in the context of FPGA design, one of ordinary skill as of September 2000 would have understood that the general teachings of Fields could be applied to the design of an ASIC chip as well as an FPGA chip and would have been motivated to apply the teaching of Fields to solve the problem of very large IC chip design. . . . One of ordinary skill in the field of EDA design would be familiar with IC design for both ASIC and FPGA formats and would rely on teachings in the context of FPGA chip design, especially in the front end of an EDA design flow, through floorplanning and partitioning of the physical design in addressing problems in ASIC chip design, and vice versa. Ex. 1009 ¶¶ 72–73. Even assuming arguendo the Board were to accept Patent Owner’s assertion that design of an FPGA is “completely different” from design of an integrated circuit, the Supreme Court’s decision in KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 417 (2007) stated, “[w]hen a work is available in one field of endeavor, design incentives and other market forces can prompt variations of it, either in the same field or a different one.” Thus, under KSR, such purportedly “different” teachings of Fields about FPGA design could be applicable to the physical design of an integrated circuit as described in the ’967 patent and in Su. We are persuaded by Petitioner’s evidence, including the VLSI textbook and the Ghiasi declaration, and find that one of ordinary skill in the art would have understood the applicability of Fields’ FPGA teachings to physical design of an integrated circuit as recited in claim 1 of the ’967 patent.” slip op. at 19

    • Obviousness (§103) › Motivation to combine / reasonable expectation of successMotivation foundDecided for petitioner

      “directed at efficient circuit design involving large and complex circuits, and determine that, as set forth in the VLSI textbook, FPGA is indeed a type of layout for physical design. We also credit the testimony of Dr. Ghiasi, who opines that: While Fields presents this logical approach to IC floorplanning in the context of FPGA design, one of ordinary skill as of September 2000 would have understood that the general teachings of Fields could be applied to the design of an ASIC chip as well as an FPGA chip and would have been motivated to apply the teaching of Fields to solve the problem of very large IC chip design. . . . One of ordinary skill in the field of EDA design would be familiar with IC design for both ASIC and FPGA formats and would rely on teachings in the context of FPGA chip design, especially in the front end of an EDA design flow, through floorplanning and partitioning of the physical design in addressing problems in ASIC chip design, and vice versa. Ex. 1009 ¶¶ 72–73. Even assuming arguendo the Board were to accept Patent Owner’s assertion that design of an FPGA is “completely different” from design of an integrated circuit, the Supreme Court’s decision in KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 417 (2007) stated, “[w]hen a work is available in one field of endeavor, design incentives and other market forces can prompt variations of it, either in the same field or a different one.” Thus, under KSR, such purportedly “different” teachings of Fields about FPGA design could be applicable to the physical design of an integrated circuit as described in the ’967 patent and in Su. We are persuaded by Petitioner’s evidence, including the VLSI textbook and the Ghiasi declaration, and find that one of ordinary skill in the art would have understood the applicability of Fields’ FPGA teachings to physical design of an integrated circuit as recited in claim 1 of the ’967 patent.” slip op. at 19

    Patent outcomesUS 6,567,967 unpatentable
    Claim construction§ 102 anticipation§ 103 obviousnesscites KSR
    Patents in suitUS 6,567,967
  • Sandisk Corporation v. Netlist, Inc.Some claims unpatentable
    PTAB · Dec 14, 2015 · IPR2014-00970 · APJ Linda M Gaudette · IPR · Final written decision

    Claims 1, 14, 15, 19–25, and 27–34 are unpatentable; the Board found other challenged claims not shown unpatentable on the grounds decided.

    RulingsFinal written decision
    • Skill levelSkill level petitioner adoptedDecided for petitioner

      “The difference in the opinions of the two experts is that Dr. Sechen believes a person of ordinary skill in the art would have an additional four years of experience, education, or a combination of the two, beyond that proposed by Dr. Alpert. See Ex. 1009 ¶ 7. According to Dr. Alpert, the difference in the proposed levels of ordinary skill in the art is not material to any dispute over claim construction or patentability in this inter partes review. Id. We accord greater weight to Dr. Alpert’s opinion as to the level of ordinary skill in the art because he has experience in both teaching students and working with engineers in the industry, while Dr. Sechen’s experience is primarily in teaching. Compare Ex. 1007 ¶¶ 7, 21 with Ex. 2012 ¶¶ 3, 5. Moreover, based on our review of the ’434 patent and the types of problems and solutions described in the ’434 patent and cited prior art, we agree with Dr. Alpert’s opinion on the level of ordinary skill. Accordingly, we find that a person of ordinary skill in the art at the time of the ’434 patent would have a Bachelor’s degree in electrical engineering, computer engineering, or in a related field and at least one year of work experience relating to memory systems, and would be familiar with the design of memory devices, memory modules, and BIST.” slip op. at 10

    • Claim Construction › Intrinsic evidence (Phillips canons) › Plain and ordinary meaning to a POSITATerm construed petitioner constructionDecided for petitioner

      “The above disclosure uses the term “operable independently” to describe the data handlers as being discrete and functioning without being physically or logically connected to each other. Based on our review of the ’434 patent, the specification and claim 27 both use the term “operable independently” in the same manner, i.e., to describe a feature of the data handler that is distinct from its data generation feature. We agree with Petitioner, therefore, that when interpreted in the context of the ’434 patent in its entirety, the claim term “operable independently” “merely means that each data handler can operate without influence or control by any of the other data handlers.” Reply 5. The ’434 patent specification uses the term “operable independently” in accordance with its plain and ordinary meaning, and we find no basis for applying the narrower construction advanced by Patent Owner to any of the challenged claims. Accordingly, we interpret “operable independently” as “operable without influence or control by another.” See Cuozzo, 793 F.3d at 1278–79.” slip op. at 19

    • Novelty / Anticipation (§102) › Anticipation standard (single reference, every element)UnpatentableUnpatentable

      “Based on the above description in Averbuj, we agree with Patent Owner that Averbuj describes memory interfaces (the alleged data handlers) that are configured to produce address and control signals, and that Averbuj describes producing address and control signals in certain circumstances, e.g., when Averbuj’s sequencer (the alleged control module) specifies writing data in a particular pattern that requires transformation to conform to a particular configuration of a memory module. See PO Resp. 33. We also agree with Petitioner, however, that Averbuj’s memory interfaces are further configured to apply to the memory modules the same address and control signals received from, and produced by, the sequencers for testing (see Reply 15), e.g., when the sequencer sends signals that can be applied, without modification or transformation (see Ex. 1003 ¶ 56), directly to a memory module irrespective of its physical configuration. Thus, Petitioner has shown, by a preponderance of the evidence, that Averbuj’s sequencer meets the limitation of “a control module configured to generate address and control signals for testing the memory devices” as recited in challenged independent claims 1, 20, and 29 of the ’434 patent.” slip op. at 41

    • Obviousness (§103) › Motivation to combine / reasonable expectation of successReasonable expectation not foundNot shown unpatentableNot shown unpatentable

      “As discussed in Section IV.B.2.e., a petition must include “[a] full statement of the reasons for the relief requested, including a detailed explanation of the significance of the evidence including material facts, and the governing law, rules, and precedent” (37 C.F.R. § 42.22(a)(2)), and “[a] reply may only respond to arguments raised in the corresponding . . . patent owner response” (37 C.F.R. § 42.23(b)). We agree with Patent Owner that the Reply does more than merely respond to or rebut arguments made in Patent Owner’s Response; rather, it sets forth a theory that was not presented clearly in the Petition. Patent Owner’s position is supported by the fact that Dr. Sechen, whose skill level is at least (and appears to exceed) that of the ordinary artisan, apparently was unable to envision how Huang and Averbuj could be combined. Further, Dr. Alpert’s second declaration includes, at a minimum, opinions as to the understanding of the ordinary artisan with respect to the teachings of Huang and Averbuj that were not presented in his first declaration. In our judgment, consideration by the Board of the above-noted arguments in the Reply and evidence presented in Dr. Alpert’s second declaration in support thereof would be improper under 37 CFR § 42.23 and unfair to Patent Owner. We have, however, reviewed and considered the arguments in the Petition and evidence therein, and are in agreement with Patent Owner that Petitioner has not provided adequate explanation or evidence to support its contention that one of ordinary skill in the art would have had a reasonable expectation of success in combining Huang and Averbuj. Accordingly, Petitioner has not met its burden to show, by a preponderance of the evidence, that claims 7–12, 17, 18, 20–25, 27, 28, and 30–35 would have been unpatentable over Huang and Averbuj.” slip op. at 59

    Patent outcomesUS 8,001,434 mixed
    Claim construction§ 102 anticipation§ 103 obviousnesscites Phillips · KSR · Graham
    Patents in suitUS 8,001,434

Holdings, summaries, rulings, issues, outcomes, winners and claim constructions shown for a decision were generated by a large language model reading the opinion. They are a guide to the decision, not the decision. Confirm every one against the court's own text before relying on it. Outcomes read from the patent owner’s side. Party names are extracted from the decision and are missing on about 900 short Director denials and scans, which carry the trial number instead.